arch/arm/mach-omap1/time.c
Source file repositories/reference/linux-study-clean/arch/arm/mach-omap1/time.c
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/mach-omap1/time.c- Extension
.c- Size
- 6616 bytes
- Lines
- 235
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/init.hlinux/delay.hlinux/interrupt.hlinux/spinlock.hlinux/clk.hlinux/err.hlinux/clocksource.hlinux/clockchips.hlinux/io.hlinux/sched_clock.hasm/irq.hasm/mach/irq.hasm/mach/time.hhardware.hmux.hiomap.hcommon.hclock.h
Detected Declarations
function omap_mpu_timer_readfunction omap_mpu_set_autoresetfunction omap_mpu_remove_autoresetfunction omap_mpu_timer_startfunction omap_mpu_timer_stopfunction omap_mpu_set_next_eventfunction omap_mpu_set_oneshotfunction omap_mpu_set_periodicfunction omap_mpu_timer1_interruptfunction omap_init_mpu_timerfunction omap_mpu_read_sched_clockfunction omap_init_clocksourcefunction omap_mpu_timer_initfunction omap_mpu_timer_initfunction omap1_timer_init
Annotated Snippet
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/spinlock.h>
#include <linux/clk.h>
#include <linux/err.h>
#include <linux/clocksource.h>
#include <linux/clockchips.h>
#include <linux/io.h>
#include <linux/sched_clock.h>
#include <asm/irq.h>
#include <asm/mach/irq.h>
#include <asm/mach/time.h>
#include "hardware.h"
#include "mux.h"
#include "iomap.h"
#include "common.h"
#include "clock.h"
#ifdef CONFIG_OMAP_MPU_TIMER
#define OMAP_MPU_TIMER_BASE OMAP_MPU_TIMER1_BASE
#define OMAP_MPU_TIMER_OFFSET 0x100
typedef struct {
u32 cntl; /* CNTL_TIMER, R/W */
u32 load_tim; /* LOAD_TIM, W */
u32 read_tim; /* READ_TIM, R */
} omap_mpu_timer_regs_t;
#define omap_mpu_timer_base(n) \
((omap_mpu_timer_regs_t __iomem *)OMAP1_IO_ADDRESS(OMAP_MPU_TIMER_BASE + \
(n)*OMAP_MPU_TIMER_OFFSET))
static inline unsigned long notrace omap_mpu_timer_read(int nr)
{
omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr);
return readl(&timer->read_tim);
}
static inline void omap_mpu_set_autoreset(int nr)
{
omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr);
writel(readl(&timer->cntl) | MPU_TIMER_AR, &timer->cntl);
}
static inline void omap_mpu_remove_autoreset(int nr)
{
omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr);
writel(readl(&timer->cntl) & ~MPU_TIMER_AR, &timer->cntl);
}
static inline void omap_mpu_timer_start(int nr, unsigned long load_val,
int autoreset)
{
omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr);
unsigned int timerflags = MPU_TIMER_CLOCK_ENABLE | MPU_TIMER_ST;
if (autoreset)
timerflags |= MPU_TIMER_AR;
writel(MPU_TIMER_CLOCK_ENABLE, &timer->cntl);
udelay(1);
writel(load_val, &timer->load_tim);
udelay(1);
writel(timerflags, &timer->cntl);
}
static inline void omap_mpu_timer_stop(int nr)
{
omap_mpu_timer_regs_t __iomem *timer = omap_mpu_timer_base(nr);
writel(readl(&timer->cntl) & ~MPU_TIMER_ST, &timer->cntl);
}
/*
* ---------------------------------------------------------------------------
* MPU timer 1 ... count down to zero, interrupt, reload
* ---------------------------------------------------------------------------
*/
static int omap_mpu_set_next_event(unsigned long cycles,
struct clock_event_device *evt)
{
omap_mpu_timer_start(0, cycles, 0);
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/init.h`, `linux/delay.h`, `linux/interrupt.h`, `linux/spinlock.h`, `linux/clk.h`, `linux/err.h`, `linux/clocksource.h`.
- Detected declarations: `function omap_mpu_timer_read`, `function omap_mpu_set_autoreset`, `function omap_mpu_remove_autoreset`, `function omap_mpu_timer_start`, `function omap_mpu_timer_stop`, `function omap_mpu_set_next_event`, `function omap_mpu_set_oneshot`, `function omap_mpu_set_periodic`, `function omap_mpu_timer1_interrupt`, `function omap_init_mpu_timer`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: source implementation candidate.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.