arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c
Source file repositories/reference/linux-study-clean/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c- Extension
.c- Size
- 6627 bytes
- Lines
- 257
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/sizes.homap_hwmod.hl3_2xxx.hl4_2xxx.homap_hwmod_common_data.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* omap_hwmod_2xxx_interconnect_data.c - common interconnect data for OMAP2xxx
*
* Copyright (C) 2009-2011 Nokia Corporation
* Paul Walmsley
*
* XXX handle crossbar/shared link difference for L3?
* XXX these should be marked initdata for multi-OMAP kernels
*/
#include <linux/sizes.h>
#include "omap_hwmod.h"
#include "l3_2xxx.h"
#include "l4_2xxx.h"
#include "omap_hwmod_common_data.h"
/*
* Common interconnect data
*/
/* L3 -> L4_CORE interface */
struct omap_hwmod_ocp_if omap2xxx_l3_main__l4_core = {
.master = &omap2xxx_l3_main_hwmod,
.slave = &omap2xxx_l4_core_hwmod,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* MPU -> L3 interface */
struct omap_hwmod_ocp_if omap2xxx_mpu__l3_main = {
.master = &omap2xxx_mpu_hwmod,
.slave = &omap2xxx_l3_main_hwmod,
.user = OCP_USER_MPU,
};
/* DSS -> l3 */
struct omap_hwmod_ocp_if omap2xxx_dss__l3 = {
.master = &omap2xxx_dss_core_hwmod,
.slave = &omap2xxx_l3_main_hwmod,
.fw = {
.omap2 = {
.l3_perm_bit = OMAP2_L3_CORE_FW_CONNID_DSS,
.flags = OMAP_FIREWALL_L3,
},
},
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* L4_CORE -> L4_WKUP interface */
struct omap_hwmod_ocp_if omap2xxx_l4_core__l4_wkup = {
.master = &omap2xxx_l4_core_hwmod,
.slave = &omap2xxx_l4_wkup_hwmod,
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* L4 CORE -> UART1 interface */
struct omap_hwmod_ocp_if omap2_l4_core__uart1 = {
.master = &omap2xxx_l4_core_hwmod,
.slave = &omap2xxx_uart1_hwmod,
.clk = "uart1_ick",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* L4 CORE -> UART2 interface */
struct omap_hwmod_ocp_if omap2_l4_core__uart2 = {
.master = &omap2xxx_l4_core_hwmod,
.slave = &omap2xxx_uart2_hwmod,
.clk = "uart2_ick",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* L4 PER -> UART3 interface */
struct omap_hwmod_ocp_if omap2_l4_core__uart3 = {
.master = &omap2xxx_l4_core_hwmod,
.slave = &omap2xxx_uart3_hwmod,
.clk = "uart3_ick",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4 core -> mcspi1 interface */
struct omap_hwmod_ocp_if omap2xxx_l4_core__mcspi1 = {
.master = &omap2xxx_l4_core_hwmod,
.slave = &omap2xxx_mcspi1_hwmod,
.clk = "mcspi1_ick",
.user = OCP_USER_MPU | OCP_USER_SDMA,
};
/* l4 core -> mcspi2 interface */
struct omap_hwmod_ocp_if omap2xxx_l4_core__mcspi2 = {
Annotation
- Immediate include surface: `linux/sizes.h`, `omap_hwmod.h`, `l3_2xxx.h`, `l4_2xxx.h`, `omap_hwmod_common_data.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.