arch/arm/mach-omap2/usb-tusb6010.c
Source file repositories/reference/linux-study-clean/arch/arm/mach-omap2/usb-tusb6010.c
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/mach-omap2/usb-tusb6010.c- Extension
.c- Size
- 5075 bytes
- Lines
- 218
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/err.hlinux/string.hlinux/types.hlinux/errno.hlinux/delay.hlinux/platform_device.hlinux/export.hlinux/platform_data/usb-omap.hlinux/usb/musb.husb-tusb6010.hgpmc.h
Detected Declarations
function tusb_set_async_modefunction tusb_set_sync_modefunction tusb6010_platform_retimefunction tusb6010_setup_interface
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/arch/arm/mach-omap2/usb-tusb6010.c
*
* Copyright (C) 2006 Nokia Corporation
*/
#include <linux/err.h>
#include <linux/string.h>
#include <linux/types.h>
#include <linux/errno.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/export.h>
#include <linux/platform_data/usb-omap.h>
#include <linux/usb/musb.h>
#include "usb-tusb6010.h"
#include "gpmc.h"
static u8 async_cs, sync_cs;
static unsigned refclk_psec;
static struct gpmc_settings tusb_async = {
.wait_on_read = true,
.wait_on_write = true,
.device_width = GPMC_DEVWIDTH_16BIT,
.mux_add_data = GPMC_MUX_AD,
};
static struct gpmc_settings tusb_sync = {
.burst_read = true,
.burst_write = true,
.sync_read = true,
.sync_write = true,
.wait_on_read = true,
.wait_on_write = true,
.burst_len = GPMC_BURST_16,
.device_width = GPMC_DEVWIDTH_16BIT,
.mux_add_data = GPMC_MUX_AD,
};
/* NOTE: timings are from tusb 6010 datasheet Rev 1.8, 12-Sept 2006 */
static int tusb_set_async_mode(unsigned sysclk_ps)
{
struct gpmc_device_timings dev_t;
struct gpmc_timings t;
unsigned t_acsnh_advnh = sysclk_ps + 3000;
memset(&dev_t, 0, sizeof(dev_t));
dev_t.t_ceasu = 8 * 1000;
dev_t.t_avdasu = t_acsnh_advnh - 7000;
dev_t.t_ce_avd = 1000;
dev_t.t_avdp_r = t_acsnh_advnh;
dev_t.t_oeasu = t_acsnh_advnh + 1000;
dev_t.t_oe = 300;
dev_t.t_cez_r = 7000;
dev_t.t_cez_w = dev_t.t_cez_r;
dev_t.t_avdp_w = t_acsnh_advnh;
dev_t.t_weasu = t_acsnh_advnh + 1000;
dev_t.t_wpl = 300;
dev_t.cyc_aavdh_we = 1;
gpmc_calc_timings(&t, &tusb_async, &dev_t);
return gpmc_cs_set_timings(async_cs, &t, &tusb_async);
}
static int tusb_set_sync_mode(unsigned sysclk_ps)
{
struct gpmc_device_timings dev_t;
struct gpmc_timings t;
unsigned t_scsnh_advnh = sysclk_ps + 3000;
memset(&dev_t, 0, sizeof(dev_t));
dev_t.clk = 11100;
dev_t.t_bacc = 1000;
dev_t.t_ces = 1000;
dev_t.t_ceasu = 8 * 1000;
dev_t.t_avdasu = t_scsnh_advnh - 7000;
dev_t.t_ce_avd = 1000;
dev_t.t_avdp_r = t_scsnh_advnh;
dev_t.cyc_aavdh_oe = 3;
dev_t.cyc_oe = 5;
dev_t.t_ce_rdyz = 7000;
dev_t.t_avdp_w = t_scsnh_advnh;
Annotation
- Immediate include surface: `linux/err.h`, `linux/string.h`, `linux/types.h`, `linux/errno.h`, `linux/delay.h`, `linux/platform_device.h`, `linux/export.h`, `linux/platform_data/usb-omap.h`.
- Detected declarations: `function tusb_set_async_mode`, `function tusb_set_sync_mode`, `function tusb6010_platform_retime`, `function tusb6010_setup_interface`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.