arch/arm/mach-orion5x/ts78xx-setup.c
Source file repositories/reference/linux-study-clean/arch/arm/mach-orion5x/ts78xx-setup.c
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/mach-orion5x/ts78xx-setup.c- Extension
.c- Size
- 14021 bytes
- Lines
- 575
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/kernel.hlinux/init.hlinux/sysfs.hlinux/platform_device.hlinux/mv643xx_eth.hlinux/ata_platform.hlinux/mtd/platnand.hlinux/timeriomem-rng.hasm/mach-types.hasm/mach/arch.hasm/mach/map.hcommon.hmpp.horion5x.hts78xx-fpga.h
Detected Declarations
function ts78xx_map_iofunction ts78xx_ts_rtc_loadfunction ts78xx_ts_rtc_unloadfunction ts78xx_ts_nand_cmd_ctrlfunction ts78xx_ts_nand_dev_readyfunction ts78xx_ts_nand_write_buffunction ts78xx_ts_nand_read_buffunction ts78xx_ts_nand_loadfunction ts78xx_ts_nand_unloadfunction ts78xx_ts_rng_loadfunction ts78xx_ts_rng_unloadfunction ts78xx_fpga_devices_zero_initfunction ts78xx_fpga_supportsfunction ts78xx_fpga_load_devicesfunction ts78xx_fpga_unload_devicesfunction ts78xx_fpga_loadfunction ts78xx_fpga_unloadfunction userspacefunction ts78xx_fpga_showfunction ts78xx_fpga_storefunction ts78xx_init
Annotated Snippet
switch ((ts78xx_fpga.id >> 8) & 0xffffff) {
case TS7800_FPGA_MAGIC:
pr_warn("unrecognised FPGA revision 0x%.2x\n",
ts78xx_fpga.id & 0xff);
ts78xx_fpga.supports.ts_rtc.present = 1;
ts78xx_fpga.supports.ts_nand.present = 1;
ts78xx_fpga.supports.ts_rng.present = 1;
break;
default:
ts78xx_fpga.supports.ts_rtc.present = 0;
ts78xx_fpga.supports.ts_nand.present = 0;
ts78xx_fpga.supports.ts_rng.present = 0;
}
}
}
static int ts78xx_fpga_load_devices(void)
{
int tmp, ret = 0;
if (ts78xx_fpga.supports.ts_rtc.present == 1) {
tmp = ts78xx_ts_rtc_load();
if (tmp)
ts78xx_fpga.supports.ts_rtc.present = 0;
ret |= tmp;
}
if (ts78xx_fpga.supports.ts_nand.present == 1) {
tmp = ts78xx_ts_nand_load();
if (tmp)
ts78xx_fpga.supports.ts_nand.present = 0;
ret |= tmp;
}
if (ts78xx_fpga.supports.ts_rng.present == 1) {
tmp = ts78xx_ts_rng_load();
if (tmp)
ts78xx_fpga.supports.ts_rng.present = 0;
ret |= tmp;
}
return ret;
}
static int ts78xx_fpga_unload_devices(void)
{
if (ts78xx_fpga.supports.ts_rtc.present == 1)
ts78xx_ts_rtc_unload();
if (ts78xx_fpga.supports.ts_nand.present == 1)
ts78xx_ts_nand_unload();
if (ts78xx_fpga.supports.ts_rng.present == 1)
ts78xx_ts_rng_unload();
return 0;
}
static int ts78xx_fpga_load(void)
{
ts78xx_fpga.id = readl(TS78XX_FPGA_REGS_VIRT_BASE);
pr_info("FPGA magic=0x%.6x, rev=0x%.2x\n",
(ts78xx_fpga.id >> 8) & 0xffffff,
ts78xx_fpga.id & 0xff);
ts78xx_fpga_supports();
if (ts78xx_fpga_load_devices()) {
ts78xx_fpga.state = -1;
return -EBUSY;
}
return 0;
};
static int ts78xx_fpga_unload(void)
{
unsigned int fpga_id;
fpga_id = readl(TS78XX_FPGA_REGS_VIRT_BASE);
/*
* There does not seem to be a feasible way to block access to the GPIO
* pins from userspace (/dev/mem). This if clause should hopefully warn
* those foolish enough not to follow 'policy' :)
*
* UrJTAG SVN since r1381 can be used to reprogram the FPGA
*/
if (ts78xx_fpga.id != fpga_id) {
pr_err("FPGA magic/rev mismatch\n"
"TS-78xx FPGA: was 0x%.6x/%.2x but now 0x%.6x/%.2x\n",
(ts78xx_fpga.id >> 8) & 0xffffff, ts78xx_fpga.id & 0xff,
Annotation
- Immediate include surface: `linux/kernel.h`, `linux/init.h`, `linux/sysfs.h`, `linux/platform_device.h`, `linux/mv643xx_eth.h`, `linux/ata_platform.h`, `linux/mtd/platnand.h`, `linux/timeriomem-rng.h`.
- Detected declarations: `function ts78xx_map_io`, `function ts78xx_ts_rtc_load`, `function ts78xx_ts_rtc_unload`, `function ts78xx_ts_nand_cmd_ctrl`, `function ts78xx_ts_nand_dev_ready`, `function ts78xx_ts_nand_write_buf`, `function ts78xx_ts_nand_read_buf`, `function ts78xx_ts_nand_load`, `function ts78xx_ts_nand_unload`, `function ts78xx_ts_rng_load`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.