arch/arm/mach-pxa/addr-map.h
Source file repositories/reference/linux-study-clean/arch/arm/mach-pxa/addr-map.h
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/mach-pxa/addr-map.h- Extension
.h- Size
- 1447 bytes
- Lines
- 62
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef __ASM_MACH_ADDR_MAP_H
#define __ASM_MACH_ADDR_MAP_H
/*
* Chip Selects
*/
#define PXA_CS0_PHYS 0x00000000
#define PXA_CS1_PHYS 0x04000000
#define PXA_CS2_PHYS 0x08000000
#define PXA_CS3_PHYS 0x0C000000
#define PXA_CS4_PHYS 0x10000000
#define PXA_CS5_PHYS 0x14000000
#define PXA300_CS0_PHYS 0x00000000 /* PXA300/PXA310 _only_ */
#define PXA300_CS1_PHYS 0x30000000 /* PXA300/PXA310 _only_ */
#define PXA3xx_CS2_PHYS 0x10000000
#define PXA3xx_CS3_PHYS 0x14000000
/*
* Peripheral Bus
*/
#define PERIPH_PHYS 0x40000000
#define PERIPH_VIRT IOMEM(0xf2000000)
#define PERIPH_SIZE 0x02000000
/*
* Static Memory Controller (w/ SDRAM controls on PXA25x/PXA27x)
*/
#define PXA2XX_SMEMC_PHYS 0x48000000
#define PXA3XX_SMEMC_PHYS 0x4a000000
#define SMEMC_VIRT IOMEM(0xf6000000)
#define SMEMC_SIZE 0x00100000
/*
* Dynamic Memory Controller (only on PXA3xx)
*/
#define DMEMC_PHYS 0x48100000
#define DMEMC_VIRT IOMEM(0xf6100000)
#define DMEMC_SIZE 0x00100000
/*
* Reserved space for low level debug virtual addresses within
* 0xf6200000..0xf6201000
*/
/*
* DFI Bus for NAND, PXA3xx only
*/
#define NAND_PHYS 0x43100000
#define NAND_VIRT IOMEM(0xf6300000)
#define NAND_SIZE 0x00100000
/*
* Internal Memory Controller (PXA27x and later)
*/
#define IMEMC_PHYS 0x58000000
#define IMEMC_VIRT IOMEM(0xfe000000)
#define IMEMC_SIZE 0x00100000
#endif /* __ASM_MACH_ADDR_MAP_H */
Annotation
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.