arch/arm/mach-rpc/include/mach/hardware.h
Source file repositories/reference/linux-study-clean/arch/arm/mach-rpc/include/mach/hardware.h
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/mach-rpc/include/mach/hardware.h- Extension
.h- Size
- 1972 bytes
- Lines
- 74
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
mach/memory.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#ifndef __ASM_ARCH_HARDWARE_H
#define __ASM_ARCH_HARDWARE_H
#include <mach/memory.h>
/*
* What hardware must be present
*/
#define HAS_IOMD
#define HAS_VIDC20
/* Hardware addresses of major areas.
* *_START is the physical address
* *_SIZE is the size of the region
* *_BASE is the virtual address
*/
#define RPC_RAM_SIZE 0x10000000
#define RPC_RAM_START 0x10000000
#define EASI_SIZE 0x08000000 /* EASI I/O */
#define EASI_START 0x08000000
#define EASI_BASE IOMEM(0xe5000000)
#define IO_START 0x03000000 /* I/O */
#define IO_SIZE 0x01000000
#define IO_BASE IOMEM(0xe0000000)
#define SCREEN_START 0x02000000 /* VRAM */
#define SCREEN_END 0xdfc00000
#define SCREEN_BASE 0xdf800000
#define UNCACHEABLE_ADDR (FLUSH_BASE + 0x10000)
/*
* IO Addresses
*/
#define ECARD_EASI_BASE (EASI_BASE)
#define VIDC_BASE (IO_BASE + 0x00400000)
#define EXPMASK_BASE (IO_BASE + 0x00360000)
#define ECARD_IOC4_BASE (IO_BASE + 0x00270000)
#define ECARD_IOC_BASE (IO_BASE + 0x00240000)
#define IOMD_BASE (IO_BASE + 0x00200000)
#define IOC_BASE (IO_BASE + 0x00200000)
#define ECARD_MEMC8_BASE (IO_BASE + 0x0002b000)
#define FLOPPYDMA_BASE (IO_BASE + 0x0002a000)
#define PCIO_BASE (IO_BASE + 0x00010000)
#define ECARD_MEMC_BASE (IO_BASE + 0x00000000)
#define vidc_writel(val) __raw_writel(val, VIDC_BASE)
#define NETSLOT_BASE 0x0302b000
#define NETSLOT_SIZE 0x00001000
#define PODSLOT_IOC0_BASE 0x03240000
#define PODSLOT_IOC4_BASE 0x03270000
#define PODSLOT_IOC_SIZE (1 << 14)
#define PODSLOT_MEMC_BASE 0x03000000
#define PODSLOT_MEMC_SIZE (1 << 14)
#define PODSLOT_EASI_BASE 0x08000000
#define PODSLOT_EASI_SIZE (1 << 24)
#define EXPMASK_STATUS (EXPMASK_BASE + 0x00)
#define EXPMASK_ENABLE (EXPMASK_BASE + 0x04)
#endif
Annotation
- Immediate include surface: `mach/memory.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.