arch/arm/mach-s3c/setup-keypad-s3c64xx.c

File Facts

System

Linux kernel

Corpus path

arch/arm/mach-s3c/setup-keypad-s3c64xx.c

Extension

.c

Size

610 bytes

Lines

21

Domain

Architecture Layer

Bucket

arch/arm

Inferred role

Architecture Layer: implementation source

Status

source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

• linux/gpio.h
• gpio-cfg.h
• keypad.h
• gpio-samsung.h

Detected Declarations

• function samsung_keypad_cfg_gpio

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
//
// Copyright (c) 2010 Samsung Electronics Co., Ltd.
//		http://www.samsung.com/
//
// GPIO configuration for S3C64XX KeyPad device

#include <linux/gpio.h>
#include "gpio-cfg.h"
#include "keypad.h"
#include "gpio-samsung.h"

void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
{
	/* Set all the necessary GPK pins to special-function 3: KP_ROW[x] */
	s3c_gpio_cfgrange_nopull(S3C64XX_GPK(8), rows, S3C_GPIO_SFN(3));

	/* Set all the necessary GPL pins to special-function 3: KP_COL[x] */
	s3c_gpio_cfgrange_nopull(S3C64XX_GPL(0), cols, S3C_GPIO_SFN(3));
}

Annotation

• Immediate include surface: `linux/gpio.h`, `gpio-cfg.h`, `keypad.h`, `gpio-samsung.h`.
• Detected declarations: `function samsung_keypad_cfg_gpio`.
• Atlas domain: Architecture Layer / arch/arm.
• Implementation status: source implementation candidate.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.