arch/arm/mach-socfpga/pm.c
Source file repositories/reference/linux-study-clean/arch/arm/mach-socfpga/pm.c
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/mach-socfpga/pm.c- Extension
.c- Size
- 3196 bytes
- Lines
- 142
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/bitops.hlinux/genalloc.hlinux/init.hlinux/io.hlinux/of.hlinux/of_platform.hlinux/platform_device.hlinux/suspend.hasm/suspend.hasm/fncpy.hcore.h
Detected Declarations
function socfpga_setup_ocram_self_refreshfunction socfpga_pm_suspendfunction socfpga_pm_enterfunction socfpga_pm_init
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* arch/arm/mach-socfpga/pm.c
*
* Copyright (C) 2014-2015 Altera Corporation. All rights reserved.
*
* with code from pm-imx6.c
* Copyright 2011-2014 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*/
#include <linux/bitops.h>
#include <linux/genalloc.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/platform_device.h>
#include <linux/suspend.h>
#include <asm/suspend.h>
#include <asm/fncpy.h>
#include "core.h"
/* Pointer to function copied to ocram */
static u32 (*socfpga_sdram_self_refresh_in_ocram)(u32 sdr_base);
static int socfpga_setup_ocram_self_refresh(void)
{
struct platform_device *pdev;
phys_addr_t ocram_pbase;
struct device_node *np;
struct gen_pool *ocram_pool;
unsigned long ocram_base;
void __iomem *suspend_ocram_base;
int ret = 0;
np = of_find_compatible_node(NULL, NULL, "mmio-sram");
if (!np) {
pr_err("%s: Unable to find mmio-sram in dtb\n", __func__);
return -ENODEV;
}
pdev = of_find_device_by_node(np);
if (!pdev) {
pr_warn("%s: failed to find ocram device!\n", __func__);
ret = -ENODEV;
goto put_node;
}
ocram_pool = gen_pool_get(&pdev->dev, NULL);
if (!ocram_pool) {
pr_warn("%s: ocram pool unavailable!\n", __func__);
ret = -ENODEV;
goto put_device;
}
ocram_base = gen_pool_alloc(ocram_pool, socfpga_sdram_self_refresh_sz);
if (!ocram_base) {
pr_warn("%s: unable to alloc ocram!\n", __func__);
ret = -ENOMEM;
goto put_device;
}
ocram_pbase = gen_pool_virt_to_phys(ocram_pool, ocram_base);
suspend_ocram_base = __arm_ioremap_exec(ocram_pbase,
socfpga_sdram_self_refresh_sz,
false);
if (!suspend_ocram_base) {
pr_warn("%s: __arm_ioremap_exec failed!\n", __func__);
ret = -ENOMEM;
goto put_device;
}
/* Copy the code that puts DDR in self refresh to ocram */
socfpga_sdram_self_refresh_in_ocram =
(void *)fncpy(suspend_ocram_base,
&socfpga_sdram_self_refresh,
socfpga_sdram_self_refresh_sz);
WARN(!socfpga_sdram_self_refresh_in_ocram,
"could not copy function to ocram");
if (!socfpga_sdram_self_refresh_in_ocram)
ret = -EFAULT;
put_device:
put_device(&pdev->dev);
put_node:
of_node_put(np);
Annotation
- Immediate include surface: `linux/bitops.h`, `linux/genalloc.h`, `linux/init.h`, `linux/io.h`, `linux/of.h`, `linux/of_platform.h`, `linux/platform_device.h`, `linux/suspend.h`.
- Detected declarations: `function socfpga_setup_ocram_self_refresh`, `function socfpga_pm_suspend`, `function socfpga_pm_enter`, `function socfpga_pm_init`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.