arch/arm/mach-tegra/platsmp.c
Source file repositories/reference/linux-study-clean/arch/arm/mach-tegra/platsmp.c
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/mach-tegra/platsmp.c- Extension
.c- Size
- 5154 bytes
- Lines
- 191
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/clk/tegra.hlinux/delay.hlinux/device.hlinux/errno.hlinux/init.hlinux/io.hlinux/jiffies.hlinux/smp.hsoc/tegra/flowctrl.hsoc/tegra/fuse.hsoc/tegra/pmc.hasm/cacheflush.hasm/mach-types.hasm/smp_plat.hasm/smp_scu.hcommon.hiomap.hreset.h
Detected Declarations
function tegra_secondary_initfunction tegra20_boot_secondaryfunction tegra30_boot_secondaryfunction tegra30_boot_secondaryfunction tegra114_boot_secondaryfunction tegra_boot_secondaryfunction tegra_smp_prepare_cpus
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/arch/arm/mach-tegra/platsmp.c
*
* Copyright (C) 2002 ARM Ltd.
* All Rights Reserved
*
* Copyright (C) 2009 Palm
* All Rights Reserved
*/
#include <linux/clk/tegra.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/jiffies.h>
#include <linux/smp.h>
#include <soc/tegra/flowctrl.h>
#include <soc/tegra/fuse.h>
#include <soc/tegra/pmc.h>
#include <asm/cacheflush.h>
#include <asm/mach-types.h>
#include <asm/smp_plat.h>
#include <asm/smp_scu.h>
#include "common.h"
#include "iomap.h"
#include "reset.h"
static cpumask_t tegra_cpu_init_mask;
static void tegra_secondary_init(unsigned int cpu)
{
cpumask_set_cpu(cpu, &tegra_cpu_init_mask);
}
static int tegra20_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
cpu = cpu_logical_map(cpu);
/*
* Force the CPU into reset. The CPU must remain in reset when
* the flow controller state is cleared (which will cause the
* flow controller to stop driving reset if the CPU has been
* power-gated via the flow controller). This will have no
* effect on first boot of the CPU since it should already be
* in reset.
*/
tegra_put_cpu_in_reset(cpu);
/*
* Unhalt the CPU. If the flow controller was used to
* power-gate the CPU this will cause the flow controller to
* stop driving reset. The CPU will remain in reset because the
* clock and reset block is now driving reset.
*/
flowctrl_write_cpu_halt(cpu, 0);
tegra_enable_cpu_clock(cpu);
flowctrl_write_cpu_csr(cpu, 0); /* Clear flow controller CSR. */
tegra_cpu_out_of_reset(cpu);
return 0;
}
static int tegra30_boot_secondary(unsigned int cpu, struct task_struct *idle)
{
int ret;
unsigned long timeout;
cpu = cpu_logical_map(cpu);
tegra_put_cpu_in_reset(cpu);
flowctrl_write_cpu_halt(cpu, 0);
/*
* The power up sequence of cold boot CPU and warm boot CPU
* was different.
*
* For warm boot CPU that was resumed from CPU hotplug, the
* power will be resumed automatically after un-halting the
* flow controller of the warm boot CPU. We need to wait for
* the confirmation that the CPU is powered then removing
* the IO clamps.
* For cold boot CPU, do not wait. After the cold boot CPU be
* booted, it will run to tegra_secondary_init() and set
* tegra_cpu_init_mask which influences what tegra30_boot_secondary()
Annotation
- Immediate include surface: `linux/clk/tegra.h`, `linux/delay.h`, `linux/device.h`, `linux/errno.h`, `linux/init.h`, `linux/io.h`, `linux/jiffies.h`, `linux/smp.h`.
- Detected declarations: `function tegra_secondary_init`, `function tegra20_boot_secondary`, `function tegra30_boot_secondary`, `function tegra30_boot_secondary`, `function tegra114_boot_secondary`, `function tegra_boot_secondary`, `function tegra_smp_prepare_cpus`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.