arch/arm/mm/copypage-feroceon.c
Source file repositories/reference/linux-study-clean/arch/arm/mm/copypage-feroceon.c
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/mm/copypage-feroceon.c- Extension
.c- Size
- 3155 bytes
- Lines
- 109
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: implementation source
- Status
- source implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/init.hlinux/highmem.h
Detected Declarations
function Copyrightfunction feroceon_copy_user_highpagefunction feroceon_clear_user_highpage
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/arch/arm/mm/copypage-feroceon.S
*
* Copyright (C) 2008 Marvell Semiconductors
*
* This handles copy_user_highpage and clear_user_page on Feroceon
* more optimally than the generic implementations.
*/
#include <linux/init.h>
#include <linux/highmem.h>
static void feroceon_copy_user_page(void *kto, const void *kfrom)
{
int tmp;
asm volatile ("\
.arch armv5te \n\
1: ldmia %1!, {r2 - r7, ip, lr} \n\
pld [%1, #0] \n\
pld [%1, #32] \n\
pld [%1, #64] \n\
pld [%1, #96] \n\
pld [%1, #128] \n\
pld [%1, #160] \n\
pld [%1, #192] \n\
stmia %0, {r2 - r7, ip, lr} \n\
ldmia %1!, {r2 - r7, ip, lr} \n\
mcr p15, 0, %0, c7, c14, 1 @ clean and invalidate D line\n\
add %0, %0, #32 \n\
stmia %0, {r2 - r7, ip, lr} \n\
ldmia %1!, {r2 - r7, ip, lr} \n\
mcr p15, 0, %0, c7, c14, 1 @ clean and invalidate D line\n\
add %0, %0, #32 \n\
stmia %0, {r2 - r7, ip, lr} \n\
ldmia %1!, {r2 - r7, ip, lr} \n\
mcr p15, 0, %0, c7, c14, 1 @ clean and invalidate D line\n\
add %0, %0, #32 \n\
stmia %0, {r2 - r7, ip, lr} \n\
ldmia %1!, {r2 - r7, ip, lr} \n\
mcr p15, 0, %0, c7, c14, 1 @ clean and invalidate D line\n\
add %0, %0, #32 \n\
stmia %0, {r2 - r7, ip, lr} \n\
ldmia %1!, {r2 - r7, ip, lr} \n\
mcr p15, 0, %0, c7, c14, 1 @ clean and invalidate D line\n\
add %0, %0, #32 \n\
stmia %0, {r2 - r7, ip, lr} \n\
ldmia %1!, {r2 - r7, ip, lr} \n\
mcr p15, 0, %0, c7, c14, 1 @ clean and invalidate D line\n\
add %0, %0, #32 \n\
stmia %0, {r2 - r7, ip, lr} \n\
ldmia %1!, {r2 - r7, ip, lr} \n\
mcr p15, 0, %0, c7, c14, 1 @ clean and invalidate D line\n\
add %0, %0, #32 \n\
stmia %0, {r2 - r7, ip, lr} \n\
subs %2, %2, #(32 * 8) \n\
mcr p15, 0, %0, c7, c14, 1 @ clean and invalidate D line\n\
add %0, %0, #32 \n\
bne 1b \n\
mcr p15, 0, %2, c7, c10, 4 @ drain WB"
: "+&r" (kto), "+&r" (kfrom), "=&r" (tmp)
: "2" (PAGE_SIZE)
: "r2", "r3", "r4", "r5", "r6", "r7", "ip", "lr");
}
void feroceon_copy_user_highpage(struct page *to, struct page *from,
unsigned long vaddr, struct vm_area_struct *vma)
{
void *kto, *kfrom;
kto = kmap_atomic(to);
kfrom = kmap_atomic(from);
flush_cache_page(vma, vaddr, page_to_pfn(from));
feroceon_copy_user_page(kto, kfrom);
kunmap_atomic(kfrom);
kunmap_atomic(kto);
}
void feroceon_clear_user_highpage(struct page *page, unsigned long vaddr)
{
void *ptr, *kaddr = kmap_atomic(page);
asm volatile ("\
mov r1, %2 \n\
mov r2, #0 \n\
mov r3, #0 \n\
mov r4, #0 \n\
mov r5, #0 \n\
mov r6, #0 \n\
mov r7, #0 \n\
mov ip, #0 \n\
Annotation
- Immediate include surface: `linux/init.h`, `linux/highmem.h`.
- Detected declarations: `function Copyright`, `function feroceon_copy_user_highpage`, `function feroceon_clear_user_highpage`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: source implementation candidate.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.