arch/arm/mm/dma-mapping.c
Source file repositories/reference/linux-study-clean/arch/arm/mm/dma-mapping.c
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/mm/dma-mapping.c- Extension
.c- Size
- 43921 bytes
- Lines
- 1750
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Uses kernel synchronization; read lock ordering, sleepability, and interrupt context assumptions before translating.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/module.hlinux/mm.hlinux/genalloc.hlinux/gfp.hlinux/errno.hlinux/list.hlinux/init.hlinux/device.hlinux/dma-direct.hlinux/dma-map-ops.hlinux/highmem.hlinux/memblock.hlinux/slab.hlinux/iommu.hlinux/io.hlinux/vmalloc.hlinux/sizes.hlinux/cma.hasm/page.hasm/highmem.hasm/cacheflush.hasm/tlbflush.hasm/mach/arch.hasm/dma-iommu.hasm/mach/map.hasm/system_info.hasm/xen/xen-ops.hdma.hmm.h
Detected Declarations
struct arm_dma_alloc_argsstruct arm_dma_free_argsstruct arm_dma_allocatorstruct arm_dma_bufferstruct dma_contig_early_reservefunction CPUfunction __dma_free_bufferfunction early_coherent_poolfunction atomic_pool_initfunction dma_contiguous_early_fixupfunction dma_contiguous_remapfunction __dma_update_ptefunction __dma_remapfunction __in_atomic_poolfunction __free_from_poolfunction __free_from_contiguousfunction __get_dma_pgprotfunction simple_allocator_freefunction cma_allocator_freefunction pool_allocator_freefunction remap_allocator_freefunction __arm_dma_freefunction dma_cache_maint_pagefunction arch_sync_dma_for_devicefunction arch_sync_dma_for_cpufunction __dma_info_to_protfunction __alloc_iovafunction __free_iovafunction __iommu_free_bufferfunction __iommu_create_mappingfunction __iommu_remove_mappingfunction __iommu_free_atomicfunction arm_iommu_mmap_attrsfunction arm_iommu_free_attrsfunction arm_iommu_get_sgtablefunction __map_sg_chunkfunction togetherfunction dma_unmap_singlefunction for_each_sgfunction arm_iommu_sync_sg_for_cpufunction arm_iommu_sync_sg_for_devicefunction arm_dma_map_pagefunction arm_dma_unmap_physfunction arm_iommu_sync_single_for_cpufunction arm_iommu_sync_single_for_devicefunction arm_iommu_create_mappingfunction release_iommu_mappingfunction extend_iommu_mapping
Annotated Snippet
struct arm_dma_alloc_args {
struct device *dev;
size_t size;
gfp_t gfp;
pgprot_t prot;
const void *caller;
bool want_vaddr;
int coherent_flag;
};
struct arm_dma_free_args {
struct device *dev;
size_t size;
void *cpu_addr;
struct page *page;
bool want_vaddr;
};
#define NORMAL 0
#define COHERENT 1
struct arm_dma_allocator {
void *(*alloc)(struct arm_dma_alloc_args *args,
struct page **ret_page);
void (*free)(struct arm_dma_free_args *args);
};
struct arm_dma_buffer {
struct list_head list;
void *virt;
struct arm_dma_allocator *allocator;
};
static LIST_HEAD(arm_dma_bufs);
static DEFINE_SPINLOCK(arm_dma_bufs_lock);
static struct arm_dma_buffer *arm_dma_buffer_find(void *virt)
{
struct arm_dma_buffer *buf, *found = NULL;
unsigned long flags;
spin_lock_irqsave(&arm_dma_bufs_lock, flags);
list_for_each_entry(buf, &arm_dma_bufs, list) {
if (buf->virt == virt) {
list_del(&buf->list);
found = buf;
break;
}
}
spin_unlock_irqrestore(&arm_dma_bufs_lock, flags);
return found;
}
/*
* The DMA API is built upon the notion of "buffer ownership". A buffer
* is either exclusively owned by the CPU (and therefore may be accessed
* by it) or exclusively owned by the DMA device. These helper functions
* represent the transitions between these two ownership states.
*
* Note, however, that on later ARMs, this notion does not work due to
* speculative prefetches. We model our approach on the assumption that
* the CPU does do speculative prefetches, which means we clean caches
* before transfers and delay cache invalidation until transfer completion.
*
*/
static void __dma_clear_buffer(struct page *page, size_t size, int coherent_flag)
{
/*
* Ensure that the allocated pages are zeroed, and that any data
* lurking in the kernel direct-mapped region is invalidated.
*/
if (PageHighMem(page)) {
phys_addr_t base = __pfn_to_phys(page_to_pfn(page));
phys_addr_t end = base + size;
while (size > 0) {
void *ptr = kmap_atomic(page);
memset(ptr, 0, PAGE_SIZE);
if (coherent_flag != COHERENT)
dmac_flush_range(ptr, ptr + PAGE_SIZE);
kunmap_atomic(ptr);
page++;
size -= PAGE_SIZE;
}
if (coherent_flag != COHERENT)
outer_flush_range(base, end);
} else {
void *ptr = page_address(page);
memset(ptr, 0, size);
if (coherent_flag != COHERENT) {
Annotation
- Immediate include surface: `linux/module.h`, `linux/mm.h`, `linux/genalloc.h`, `linux/gfp.h`, `linux/errno.h`, `linux/list.h`, `linux/init.h`, `linux/device.h`.
- Detected declarations: `struct arm_dma_alloc_args`, `struct arm_dma_free_args`, `struct arm_dma_allocator`, `struct arm_dma_buffer`, `struct dma_contig_early_reserve`, `function CPU`, `function __dma_free_buffer`, `function early_coherent_pool`, `function atomic_pool_init`, `function dma_contiguous_early_fixup`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: integration implementation candidate.
- Synchronization appears in or near this file; preserve lock ordering, sleepability, and interrupt-context constraints.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.