arch/arm/mm/nommu.c
Source file repositories/reference/linux-study-clean/arch/arm/mm/nommu.c
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/mm/nommu.c- Extension
.c- Size
- 5805 bytes
- Lines
- 245
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: exported/initcall integration point
- Status
- integration implementation candidate
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Exports symbols or registers init work; inspect boot/module ordering and who consumes the exported contract.
- Touches user memory; correctness depends on fault-safe copying and privilege boundary handling.
- Allocates kernel memory; connect allocation flags and lifetime to context constraints.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
linux/module.hlinux/mm.hlinux/pagemap.hlinux/io.hlinux/memblock.hlinux/kernel.hasm/cacheflush.hasm/cp15.hasm/sections.hasm/page.hasm/setup.hasm/traps.hasm/mach/arch.hasm/cputype.hasm/mpu.hasm/procinfo.hasm/idmap.hmm.hasm/mach/map.h
Detected Declarations
function setup_vectors_basefunction set_vbarfunction security_extensions_enabledfunction setup_vectors_basefunction arm_mm_memblock_reservefunction adjust_lowmem_bounds_mpufunction mpu_setupfunction adjust_lowmem_boundsfunction paging_initfunction setup_mm_for_rebootfunction flush_dcache_pagefunction copy_to_user_pagefunction iounmapexport flush_dcache_folioexport flush_dcache_pageexport __arm_ioremap_pfnexport ioremapexport ioremap_cacheexport ioremap_wcexport pci_remap_cfgspaceexport iounmap
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-only
/*
* linux/arch/arm/mm/nommu.c
*
* ARM uCLinux supporting functions.
*/
#include <linux/module.h>
#include <linux/mm.h>
#include <linux/pagemap.h>
#include <linux/io.h>
#include <linux/memblock.h>
#include <linux/kernel.h>
#include <asm/cacheflush.h>
#include <asm/cp15.h>
#include <asm/sections.h>
#include <asm/page.h>
#include <asm/setup.h>
#include <asm/traps.h>
#include <asm/mach/arch.h>
#include <asm/cputype.h>
#include <asm/mpu.h>
#include <asm/procinfo.h>
#include <asm/idmap.h>
#include "mm.h"
unsigned long vectors_base;
#ifdef CONFIG_ARM_MPU
struct mpu_rgn_info mpu_rgn_info;
#endif
#ifdef CONFIG_CPU_CP15
#ifdef CONFIG_CPU_HIGH_VECTOR
unsigned long setup_vectors_base(void)
{
unsigned long reg = get_cr();
set_cr(reg | CR_V);
return 0xffff0000;
}
#else /* CONFIG_CPU_HIGH_VECTOR */
/* Write exception base address to VBAR */
static inline void set_vbar(unsigned long val)
{
asm("mcr p15, 0, %0, c12, c0, 0" : : "r" (val) : "cc");
}
/*
* Security extensions, bits[7:4], permitted values,
* 0b0000 - not implemented, 0b0001/0b0010 - implemented
*/
static inline bool security_extensions_enabled(void)
{
/* Check CPUID Identification Scheme before ID_PFR1 read */
if ((read_cpuid_id() & 0x000f0000) == 0x000f0000)
return cpuid_feature_extract(CPUID_EXT_PFR1, 4) ||
cpuid_feature_extract(CPUID_EXT_PFR1, 20);
return 0;
}
unsigned long setup_vectors_base(void)
{
unsigned long base = 0, reg = get_cr();
set_cr(reg & ~CR_V);
if (security_extensions_enabled()) {
if (IS_ENABLED(CONFIG_REMAP_VECTORS_TO_RAM))
base = CONFIG_DRAM_BASE;
set_vbar(base);
} else if (IS_ENABLED(CONFIG_REMAP_VECTORS_TO_RAM)) {
if (CONFIG_DRAM_BASE != 0)
pr_err("Security extensions not enabled, vectors cannot be remapped to RAM, vectors base will be 0x00000000\n");
}
return base;
}
#endif /* CONFIG_CPU_HIGH_VECTOR */
#endif /* CONFIG_CPU_CP15 */
void __init arm_mm_memblock_reserve(void)
{
#ifndef CONFIG_CPU_V7M
vectors_base = IS_ENABLED(CONFIG_CPU_CP15) ? setup_vectors_base() : 0;
/*
* Register the exception vector page.
* some architectures which the DRAM is the exception vector to trap,
* alloc_page breaks with error, although it is not NULL, but "0."
*/
Annotation
- Immediate include surface: `linux/module.h`, `linux/mm.h`, `linux/pagemap.h`, `linux/io.h`, `linux/memblock.h`, `linux/kernel.h`, `asm/cacheflush.h`, `asm/cp15.h`.
- Detected declarations: `function setup_vectors_base`, `function set_vbar`, `function security_extensions_enabled`, `function setup_vectors_base`, `function arm_mm_memblock_reserve`, `function adjust_lowmem_bounds_mpu`, `function mpu_setup`, `function adjust_lowmem_bounds`, `function paging_init`, `function setup_mm_for_reboot`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: integration implementation candidate.
- This snippet crosses the user/kernel memory boundary; validate fault handling and access checks before translating the pattern.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.