arch/arm/nwfpe/fpmodule.inl
Source file repositories/reference/linux-study-clean/arch/arm/nwfpe/fpmodule.inl
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/nwfpe/fpmodule.inl- Extension
.inl- Size
- 2234 bytes
- Lines
- 75
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: arch/arm
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Defines or uses C structs; map object ownership, embedded links, reference counts, and lock ownership.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
function readRegisterfunction writeRegisterfunction readCPSRfunction writeCPSRfunction readConditionCodesfunction writeConditionCodes
Annotated Snippet
NetWinder Floating Point Emulator
(c) Rebel.COM, 1998,1999
Direct questions, comments to Scott Bambrough <scottb@netwinder.org>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
*/
static inline unsigned long readRegister(const unsigned int nReg)
{
/* Note: The CPU thinks it has dealt with the current instruction.
As a result the program counter has been advanced to the next
instruction, and points 4 bytes beyond the actual instruction
that caused the invalid instruction trap to occur. We adjust
for this in this routine. LDF/STF instructions with Rn = PC
depend on the PC being correct, as they use PC+8 in their
address calculations. */
struct pt_regs *regs = GET_USERREG();
unsigned int val = regs->uregs[nReg];
if (REG_PC == nReg)
val -= 4;
return val;
}
static inline void
writeRegister(const unsigned int nReg, const unsigned long val)
{
struct pt_regs *regs = GET_USERREG();
regs->uregs[nReg] = val;
}
static inline unsigned long readCPSR(void)
{
return (readRegister(REG_CPSR));
}
static inline void writeCPSR(const unsigned long val)
{
writeRegister(REG_CPSR, val);
}
static inline unsigned long readConditionCodes(void)
{
#ifdef __FPEM_TEST__
return (0);
#else
return (readCPSR() & CC_MASK);
#endif
}
static inline void writeConditionCodes(const unsigned long val)
{
struct pt_regs *regs = GET_USERREG();
unsigned long rval;
/*
* Operate directly on userRegisters since
* the CPSR may be the PC register itself.
*/
Annotation
- Detected declarations: `function readRegister`, `function writeRegister`, `function readCPSR`, `function writeCPSR`, `function readConditionCodes`, `function writeConditionCodes`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.