arch/arm/vfp/vfphw.S
Source file repositories/reference/linux-study-clean/arch/arm/vfp/vfphw.S
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/vfp/vfphw.S- Extension
.S- Size
- 3303 bytes
- Lines
- 153
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: arch/arm
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
linux/init.hlinux/linkage.hasm/thread_info.hasm/vfpmacros.hlinux/kern_levels.hasm/assembler.hasm/asm-offsets.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#include <linux/init.h>
#include <linux/linkage.h>
#include <asm/thread_info.h>
#include <asm/vfpmacros.h>
#include <linux/kern_levels.h>
#include <asm/assembler.h>
#include <asm/asm-offsets.h>
.macro DBGSTR1, str, arg
#ifdef DEBUG
stmfd sp!, {r0-r3, ip, lr}
mov r1, \arg
ldr r0, =1f
bl _printk
ldmfd sp!, {r0-r3, ip, lr}
.pushsection .rodata, "a"
1: .ascii KERN_DEBUG "VFP: \str\n"
.byte 0
.previous
#endif
.endm
ENTRY(vfp_load_state)
@ Load the current VFP state
@ r0 - load location
@ returns FPEXC
DBGSTR1 "load VFP state %p", r0
@ Load the saved state back into the VFP
VFPFLDMIA r0, r1 @ reload the working registers while
@ FPEXC is in a safe state
ldmia r0, {r0-r3} @ load FPEXC, FPSCR, FPINST, FPINST2
tst r0, #FPEXC_EX @ is there additional state to restore?
beq 1f
VFPFMXR FPINST, r2 @ restore FPINST (only if FPEXC.EX is set)
tst r0, #FPEXC_FP2V @ is there an FPINST2 to write?
beq 1f
VFPFMXR FPINST2, r3 @ FPINST2 if needed (and present)
1:
VFPFMXR FPSCR, r1 @ restore status
ret lr
ENDPROC(vfp_load_state)
ENTRY(vfp_save_state)
@ Save the current VFP state
@ r0 - save location
@ r1 - FPEXC
DBGSTR1 "save VFP state %p", r0
VFPFSTMIA r0, r2 @ save the working registers
VFPFMRX r2, FPSCR @ current status
tst r1, #FPEXC_EX @ is there additional state to save?
beq 1f
VFPFMRX r3, FPINST @ FPINST (only if FPEXC.EX is set)
tst r1, #FPEXC_FP2V @ is there an FPINST2 to read?
beq 1f
VFPFMRX r12, FPINST2 @ FPINST2 if needed (and present)
1:
stmia r0, {r1, r2, r3, r12} @ save FPEXC, FPSCR, FPINST, FPINST2
ret lr
ENDPROC(vfp_save_state)
.macro tbl_branch, base, tmp, shift
#ifdef CONFIG_THUMB2_KERNEL
adr \tmp, 1f
add \tmp, \tmp, \base, lsl \shift
ret \tmp
#else
add pc, pc, \base, lsl \shift
mov r0, r0
#endif
Annotation
- Immediate include surface: `linux/init.h`, `linux/linkage.h`, `asm/thread_info.h`, `asm/vfpmacros.h`, `linux/kern_levels.h`, `asm/assembler.h`, `asm/asm-offsets.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.