arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-emmc.dts
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-emmc.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/allwinner/sun50i-a64-olinuxino-emmc.dts- Extension
.dts- Size
- 555 bytes
- Lines
- 26
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
sun50i-a64-olinuxino.dts
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2018 Martin Ayotte <martinayotte@gmail.com>
// Copyright (C) 2019 Sunil Mohan Adapa <sunil@medhas.org>
#include "sun50i-a64-olinuxino.dts"
/ {
model = "Olimex A64-Olinuxino-eMMC";
compatible = "olimex,a64-olinuxino-emmc", "allwinner,sun50i-a64";
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>;
vmmc-supply = <®_dcdc1>;
vqmmc-supply = <®_eldo1>;
bus-width = <8>;
non-removable;
cap-mmc-hw-reset;
status = "okay";
};
&pio {
vcc-pc-supply = <®_eldo1>;
};
Annotation
- Immediate include surface: `sun50i-a64-olinuxino.dts`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.