arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi
Extension
.dtsi
Size
6493 bytes
Lines
271
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2016 ARM Ltd.

#include <arm/allwinner/sunxi-h3-h5.dtsi>

#include <dt-bindings/thermal/thermal.h>

/ {
	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <0>;
			enable-method = "psci";
			clocks = <&ccu CLK_CPUX>;
			#cooling-cells = <2>;
		};

		cpu1: cpu@1 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <1>;
			enable-method = "psci";
			clocks = <&ccu CLK_CPUX>;
			#cooling-cells = <2>;
		};

		cpu2: cpu@2 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <2>;
			enable-method = "psci";
			clocks = <&ccu CLK_CPUX>;
			#cooling-cells = <2>;
		};

		cpu3: cpu@3 {
			compatible = "arm,cortex-a53";
			device_type = "cpu";
			reg = <3>;
			enable-method = "psci";
			clocks = <&ccu CLK_CPUX>;
			#cooling-cells = <2>;
		};
	};

	pmu {
		compatible = "arm,cortex-a53-pmu";
		interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
	};

	psci {
		compatible = "arm,psci-0.2";
		method = "smc";
	};

	timer {
		compatible = "arm,armv8-timer";
		arm,no-tick-in-suspend;
		interrupts = <GIC_PPI 13
				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 14
				(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

Annotation

Implementation Notes