arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/allwinner/sun50i-h6-cpu-opp.dtsi- Extension
.dtsi- Size
- 3212 bytes
- Lines
- 118
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
// Copyright (C) 2020 Ondrej Jirman <megous@megous.com>
// Copyright (C) 2020 Clément Péron <peron.clem@gmail.com>
/ {
cpu_opp_table: opp-table-cpu {
compatible = "allwinner,sun50i-h6-operating-points";
nvmem-cells = <&cpu_speed_grade>;
opp-shared;
opp-480000000 {
clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <480000000>;
opp-microvolt-speed0 = <880000 880000 1200000>;
opp-microvolt-speed1 = <820000 820000 1200000>;
opp-microvolt-speed2 = <820000 820000 1200000>;
};
opp-720000000 {
clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <720000000>;
opp-microvolt-speed0 = <880000 880000 1200000>;
opp-microvolt-speed1 = <820000 820000 1200000>;
opp-microvolt-speed2 = <820000 820000 1200000>;
};
opp-816000000 {
clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <816000000>;
opp-microvolt-speed0 = <880000 880000 1200000>;
opp-microvolt-speed1 = <820000 820000 1200000>;
opp-microvolt-speed2 = <820000 820000 1200000>;
};
opp-888000000 {
clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <888000000>;
opp-microvolt-speed0 = <880000 880000 1200000>;
opp-microvolt-speed1 = <820000 820000 1200000>;
opp-microvolt-speed2 = <820000 820000 1200000>;
};
opp-1080000000 {
clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <1080000000>;
opp-microvolt-speed0 = <940000 940000 1200000>;
opp-microvolt-speed1 = <880000 880000 1200000>;
opp-microvolt-speed2 = <880000 880000 1200000>;
};
opp-1320000000 {
clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <1320000000>;
opp-microvolt-speed0 = <1000000 1000000 1200000>;
opp-microvolt-speed1 = <940000 940000 1200000>;
opp-microvolt-speed2 = <940000 940000 1200000>;
};
opp-1488000000 {
clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <1488000000>;
opp-microvolt-speed0 = <1060000 1060000 1200000>;
opp-microvolt-speed1 = <1000000 1000000 1200000>;
Annotation
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.