arch/arm64/boot/dts/amd/elba-16core.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/amd/elba-16core.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/amd/elba-16core.dtsi
Extension
.dtsi
Size
3724 bytes
Lines
198
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
 * Copyright 2020-2023 Advanced Micro Devices, Inc.
 */

/ {
	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu-map {
			cluster0 {
				core0 { cpu = <&cpu0>; };
				core1 { cpu = <&cpu1>; };
				core2 { cpu = <&cpu2>; };
				core3 { cpu = <&cpu3>; };
			};

			cluster1 {
				core0 { cpu = <&cpu4>; };
				core1 { cpu = <&cpu5>; };
				core2 { cpu = <&cpu6>; };
				core3 { cpu = <&cpu7>; };
			};

			cluster2 {
				core0 { cpu = <&cpu8>; };
				core1 { cpu = <&cpu9>; };
				core2 { cpu = <&cpu10>; };
				core3 { cpu = <&cpu11>; };
			};

			cluster3 {
				core0 { cpu = <&cpu12>; };
				core1 { cpu = <&cpu13>; };
				core2 { cpu = <&cpu14>; };
				core3 { cpu = <&cpu15>; };
			};
		};

		/* CLUSTER 0 */
		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x0>;
			next-level-cache = <&l2_0>;
			enable-method = "psci";
		};

		cpu1: cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x1>;
			next-level-cache = <&l2_0>;
			enable-method = "psci";
		};

		cpu2: cpu@2 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x2>;
			next-level-cache = <&l2_0>;
			enable-method = "psci";
		};

		cpu3: cpu@3 {
			device_type = "cpu";
			compatible = "arm,cortex-a72";
			reg = <0x3>;
			next-level-cache = <&l2_0>;

Annotation

Implementation Notes