arch/arm64/boot/dts/amd/elba.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/amd/elba.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/amd/elba.dtsi- Extension
.dtsi- Size
- 4553 bytes
- Lines
- 192
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/gpio/gpio.hdt-bindings/interrupt-controller/arm-gic.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
* Copyright 2020-2022 Advanced Micro Devices, Inc.
*/
#include <dt-bindings/gpio/gpio.h>
#include "dt-bindings/interrupt-controller/arm-gic.h"
/ {
model = "Elba ASIC Board";
compatible = "amd,pensando-elba";
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
dma-coherent;
ahb_clk: oscillator0 {
compatible = "fixed-clock";
#clock-cells = <0>;
};
emmc_clk: oscillator2 {
compatible = "fixed-clock";
#clock-cells = <0>;
};
flash_clk: oscillator3 {
compatible = "fixed-clock";
#clock-cells = <0>;
};
ref_clk: oscillator4 {
compatible = "fixed-clock";
#clock-cells = <0>;
};
psci {
compatible = "arm,psci-0.2";
method = "smc";
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
};
pmu {
compatible = "arm,cortex-a72-pmu";
interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_LOW>;
};
soc: soc {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges;
i2c0: i2c@400 {
compatible = "snps,designware-i2c";
reg = <0x0 0x400 0x0 0x100>;
clocks = <&ahb_clk>;
#address-cells = <1>;
#size-cells = <0>;
i2c-sda-hold-time-ns = <480>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
Annotation
- Immediate include surface: `dt-bindings/gpio/gpio.h`, `dt-bindings/interrupt-controller/arm-gic.h`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.