arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/amlogic/amlogic-s7.dtsi
Extension
.dtsi
Size
6011 bytes
Lines
245
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2025 Amlogic, Inc. All rights reserved.
 */

#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/amlogic,pinctrl.h>
#include <dt-bindings/power/amlogic,s7-pwrc.h>

/ {
	cpus {
		#address-cells = <2>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a55";
			reg = <0x0 0x0>;
			enable-method = "psci";
			d-cache-line-size = <32>;
			d-cache-size = <0x8000>;
			d-cache-sets = <32>;
			i-cache-line-size = <32>;
			i-cache-size = <0x8000>;
			i-cache-sets = <32>;
			next-level-cache = <&l2>;
		};

		cpu1: cpu@100 {
			device_type = "cpu";
			compatible = "arm,cortex-a55";
			reg = <0x0 0x100>;
			enable-method = "psci";
			d-cache-line-size = <32>;
			d-cache-size = <0x8000>;
			d-cache-sets = <32>;
			i-cache-line-size = <32>;
			i-cache-size = <0x8000>;
			i-cache-sets = <32>;
			next-level-cache = <&l2>;
		};

		cpu2: cpu@200 {
			device_type = "cpu";
			compatible = "arm,cortex-a55";
			reg = <0x0 0x200>;
			enable-method = "psci";
			d-cache-line-size = <32>;
			d-cache-size = <0x8000>;
			d-cache-sets = <32>;
			i-cache-line-size = <32>;
			i-cache-size = <0x8000>;
			i-cache-sets = <32>;
			next-level-cache = <&l2>;
		};

		cpu3: cpu@300 {
			device_type = "cpu";
			compatible = "arm,cortex-a55";
			reg = <0x0 0x300>;
			enable-method = "psci";
			d-cache-line-size = <32>;
			d-cache-size = <0x8000>;
			d-cache-sets = <32>;
			i-cache-line-size = <32>;
			i-cache-size = <0x8000>;
			i-cache-sets = <32>;
			next-level-cache = <&l2>;

Annotation

Implementation Notes