arch/arm64/boot/dts/amlogic/amlogic-t7-reset.h

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/amlogic/amlogic-t7-reset.h

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/amlogic/amlogic-t7-reset.h
Extension
.h
Size
5307 bytes
Lines
198
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: implementation source
Status
source implementation candidate

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

#ifndef __DTS_AMLOGIC_T7_RESET_H
#define __DTS_AMLOGIC_T7_RESET_H

/* RESET0 */
/*					0-3	*/
#define RESET_USB			4
#define RESET_U2DRD			5
#define RESET_U3DRD			6
#define RESET_U3DRD_PIPE0		7
#define RESET_U2PHY20			8
#define RESET_U2PHY21			9
#define RESET_GDC			10
#define RESET_HDMI20_AES		11
#define RESET_HDMIRX			12
#define RESET_HDMIRX_APB		13
#define RESET_DEWARP			14
/*					15	*/
#define RESET_HDMITX_CAPB3		16
#define RESET_BRG_VCBUG_DEC		17
#define RESET_VCBUS			18
#define RESET_VID_PLL_DIV		19
#define RESET_VDI6			20
#define RESET_GE2D			21
#define RESET_HDMITXPHY			22
#define RESET_VID_LOCK			23
#define RESET_VENC0			24
#define RESET_VDAC			25
#define RESET_VENC2			26
#define RESET_VENC1			27
#define RESET_RDMA			28
#define RESET_HDMITX			29
#define RESET_VIU			30
#define RESET_VENC			31

/* RESET1 */
#define RESET_AUDIO			32
#define RESET_MALI_CAPB3		33
#define RESET_MALI			34
#define RESET_DDR_APB			35
#define RESET_DDR			36
#define RESET_DOS_CAPB3			37
#define RESET_DOS			38
#define RESET_COMBO_DPHY_CHAN2		39
#define RESET_DEBUG_B			40
#define RESET_DEBUG_A			41
#define RESET_DSP_B			42
#define RESET_DSP_A			43
#define RESET_PCIE_A			44
#define RESET_PCIE_PHY			45
#define RESET_PCIE_APB			46
#define RESET_ANAKIN			47
#define RESET_ETH			48
#define RESET_EDP0_CTRL			49
#define RESET_EDP1_CTRL			50
#define RESET_COMBO_DPHY_CHAN0		51
#define RESET_COMBO_DPHY_CHAN1		52
#define RESET_DSI_LVDS_EDP_TOP		53
#define RESET_PCIE1_PHY			54
#define RESET_PCIE1_APB			55
#define RESET_DDR_1			56
/*					57	*/
#define RESET_EDP1_PIPELINE		58
#define RESET_EDP0_PIPELINE		59
#define RESET_MIPI_DSI1_PHY		60
#define RESET_MIPI_DSI0_PHY		61
#define RESET_MIPI_DSI_A_HOST		62
#define RESET_MIPI_DSI_B_HOST		63

/* RESET2 */
#define RESET_DEVICE_MMC_ARB		64
#define RESET_IR_CTRL			65
#define RESET_TS_A73			66
#define RESET_TS_A53			67
#define RESET_SPICC_2			68
#define RESET_SPICC_3			69
#define RESET_SPICC_4			70
#define RESET_SPICC_5			71
#define RESET_SMART_CARD		72
#define RESET_SPICC_0			73
#define RESET_SPICC_1			74
#define RESET_RSA			75
/*					76-79	*/
#define RESET_MSR_CLK			80
#define RESET_SPIFC			81
#define RESET_SAR_ADC			82
#define RESET_BT			83
/*					84-87	*/
#define RESET_ACODEC			88
#define RESET_CEC			89
#define RESET_AFIFO			90

Annotation

Implementation Notes