arch/arm64/boot/dts/amlogic/meson-khadas-vim3-ts050.dtso

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/amlogic/meson-khadas-vim3-ts050.dtso

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/amlogic/meson-khadas-vim3-ts050.dtso
Extension
.dtso
Size
2296 bytes
Lines
109
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: arch/arm64
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2019 BayLibre, SAS
 * Author: Neil Armstrong <narmstrong@baylibre.com>
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/g12a-clkc.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/amlogic,meson-g12a-gpio-intc.h>

/dts-v1/;
/plugin/;

/*
 * Enable Khadas TS050 DSI Panel + Touch Controller
 * on Khadas VIM3 (A311D) and VIM3L (S905D3)
 */

&{/} {
	panel_backlight: backlight {
		compatible = "pwm-backlight";
		pwms = <&pwm_AO_cd 0 25000 0>;
		brightness-levels = <0 255>;
		num-interpolated-steps = <255>;
		default-brightness-level = <200>;
	};
};

&i2c3 {
	#address-cells = <1>;
	#size-cells = <0>;
	pinctrl-0 = <&i2c3_sda_a_pins>, <&i2c3_sck_a_pins>;
	pinctrl-names = "default";
	status = "okay";

	touch-controller@38 {
		compatible = "edt,edt-ft5206";
		reg = <0x38>;
		interrupt-parent = <&gpio_intc>;
		interrupts = <IRQID_GPIOA_5 IRQ_TYPE_EDGE_FALLING>;
		reset-gpios = <&gpio_expander 6 GPIO_ACTIVE_LOW>;
		touchscreen-size-x = <1080>;
		touchscreen-size-y = <1920>;
		status = "okay";
	};
};

&mipi_dsi {
	#address-cells = <1>;
	#size-cells = <0>;
	status = "okay";

	assigned-clocks = <&clkc CLKID_GP0_PLL>,
			  <&clkc CLKID_MIPI_DSI_PXCLK_SEL>,
			  <&clkc CLKID_MIPI_DSI_PXCLK>,
			  <&clkc CLKID_CTS_ENCL_SEL>,
			  <&clkc CLKID_VCLK2_SEL>;
	assigned-clock-parents = <0>,
				 <&clkc CLKID_GP0_PLL>,
				 <0>,
				 <&clkc CLKID_VCLK2_DIV1>,
				 <&clkc CLKID_GP0_PLL>;
	assigned-clock-rates = <960000000>,
			       <0>,
			       <960000000>,
			       <0>,
			       <0>;

Annotation

Implementation Notes