arch/arm64/boot/dts/apple/s5l8960x-pmgr.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/apple/s5l8960x-pmgr.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/apple/s5l8960x-pmgr.dtsi- Extension
.dtsi- Size
- 15890 bytes
- Lines
- 611
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* PMGR Power domains for the Apple S5L8960X "A7" SoC
*
* Copyright (c) 2024 Nick Chan <towinchenmi@gmail.com>
*/
&pmgr {
ps_cpu0: power-controller@20000 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20000 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "cpu0";
apple,always-on; /* Core device */
};
ps_cpu1: power-controller@20008 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20008 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "cpu1";
apple,always-on; /* Core device */
};
ps_secuart0: power-controller@200f0 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x200f0 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "secuart0";
power-domains = <&ps_sio_p>;
};
ps_secuart1: power-controller@200f8 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x200f8 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "secuart1";
power-domains = <&ps_sio_p>;
};
ps_cpm: power-controller@20010 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20010 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "cpm";
apple,always-on; /* Core device */
};
ps_lio: power-controller@20018 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20018 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "lio";
apple,always-on; /* Core device */
};
ps_iomux: power-controller@20020 {
compatible = "apple,s5l8960x-pmgr-pwrstate", "apple,pmgr-pwrstate";
reg = <0x20020 4>;
#power-domain-cells = <0>;
#reset-cells = <0>;
label = "iomux";
apple,always-on; /* Core device */
};
Annotation
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.