arch/arm64/boot/dts/apple/s8000.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/apple/s8000.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/apple/s8000.dtsi- Extension
.dtsi- Size
- 1427 bytes
- Lines
- 69
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
s800-0-3.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Apple S8000 "A9" (Samsung) SoC
*
* Other names: H8P, "Maui"
*
* Copyright (c) 2024, Nick Chan <towinchenmi@gmail.com>
*/
#include "s800-0-3.dtsi"
/ {
twister_opp: opp-table {
compatible = "operating-points-v2";
opp01 {
opp-hz = /bits/ 64 <300000000>;
opp-level = <1>;
clock-latency-ns = <650>;
};
opp02 {
opp-hz = /bits/ 64 <396000000>;
opp-level = <2>;
clock-latency-ns = <75000>;
};
opp03 {
opp-hz = /bits/ 64 <600000000>;
opp-level = <3>;
clock-latency-ns = <27000>;
};
opp04 {
opp-hz = /bits/ 64 <912000000>;
opp-level = <4>;
clock-latency-ns = <32000>;
};
opp05 {
opp-hz = /bits/ 64 <1200000000>;
opp-level = <5>;
clock-latency-ns = <35000>;
};
opp06 {
opp-hz = /bits/ 64 <1512000000>;
opp-level = <6>;
clock-latency-ns = <45000>;
};
opp07 {
opp-hz = /bits/ 64 <1800000000>;
opp-level = <7>;
clock-latency-ns = <58000>;
};
#if 0
/* Not available until CPU deep sleep is implemented */
opp08 {
opp-hz = /bits/ 64 <1844000000>;
opp-level = <8>;
clock-latency-ns = <58000>;
turbo-mode;
};
#endif
};
};
/*
* The A9 was made by two separate fabs on two different process
* nodes: Samsung made the S8000 (APL0898) on 14nm and TSMC made
* the S8003 (APL1022) on 16nm. There are some minor differences
* such as timing in cpufreq state transistions.
*/
Annotation
- Immediate include surface: `s800-0-3.dtsi`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.