arch/arm64/boot/dts/apple/t600x-common.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/apple/t600x-common.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/apple/t600x-common.dtsi
Extension
.dtsi
Size
9247 bytes
Lines
416
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
 * Common Apple T6000 / T6001 / T6002 "M1 Pro/Max/Ultra" SoC
 *
 * Other names: H13J, "Jade Chop", "Jade", "Jade 2C"
 *
 * Copyright The Asahi Linux Contributors
 */

/ {
	#address-cells = <2>;
	#size-cells = <2>;

	aliases {
		gpu = &gpu;
	};

	cpus {
		#address-cells = <2>;
		#size-cells = <0>;

		cpu-map {
			cluster0 {
				core0 {
					cpu = <&cpu_e00>;
				};
				core1 {
					cpu = <&cpu_e01>;
				};
			};

			cluster1 {
				core0 {
					cpu = <&cpu_p00>;
				};
				core1 {
					cpu = <&cpu_p01>;
				};
				core2 {
					cpu = <&cpu_p02>;
				};
				core3 {
					cpu = <&cpu_p03>;
				};
			};

			cluster2 {
				core0 {
					cpu = <&cpu_p10>;
				};
				core1 {
					cpu = <&cpu_p11>;
				};
				core2 {
					cpu = <&cpu_p12>;
				};
				core3 {
					cpu = <&cpu_p13>;
				};
			};
		};

		cpu_e00: cpu@0 {
			compatible = "apple,icestorm";
			device_type = "cpu";
			reg = <0x0 0x0>;
			enable-method = "spin-table";
			cpu-release-addr = <0 0>; /* To be filled by loader */
			next-level-cache = <&l2_cache_0>;
			i-cache-size = <0x20000>;

Annotation

Implementation Notes