arch/arm64/boot/dts/apple/t6021-j475c.dts
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/apple/t6021-j475c.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/apple/t6021-j475c.dts- Extension
.dts- Size
- 601 bytes
- Lines
- 38
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
t6021.dtsit602x-j474-j475.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
* Mac Studio (M2 Max, 2023)
*
* target-type: J475c
*
* Copyright The Asahi Linux Contributors
*/
/dts-v1/;
#include "t6021.dtsi"
#include "t602x-j474-j475.dtsi"
/ {
compatible = "apple,j475c", "apple,t6021", "apple,arm-platform";
model = "Apple Mac Studio (M2 Max, 2023)";
};
&wifi0 {
compatible = "pci14e4,4434";
brcm,board-type = "apple,canary";
};
&bluetooth0 {
compatible = "pci14e4,5f72";
brcm,board-type = "apple,canary";
};
/* enable PCIe port01 with SDHCI */
&port01 {
status = "okay";
};
&pcie0_dart_1 {
status = "okay";
};
Annotation
- Immediate include surface: `t6021.dtsi`, `t602x-j474-j475.dtsi`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.