arch/arm64/boot/dts/apple/t8012.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/apple/t8012.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/apple/t8012.dtsi
Extension
.dtsi
Size
7971 bytes
Lines
303
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0+ OR MIT
/*
 * Apple T8012 "T2" SoC
 *
 * Other names: H9M, "Gibraltar"
 *
 * Copyright (c) 2024, Nick Chan <towinchenmi@gmail.com>
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/apple-aic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/apple.h>
#include <dt-bindings/spmi/spmi.h>

/ {
	interrupt-parent = <&aic>;
	#address-cells = <2>;
	#size-cells = <2>;

	clkref: clock-ref {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <24000000>;
		clock-output-names = "clkref";
	};

	cpus {
		#address-cells = <2>;
		#size-cells = <0>;

		cpu0: cpu@10000 {
			compatible = "apple,hurricane-zephyr";
			reg = <0x0 0x10000>;
			cpu-release-addr = <0 0>; /* To be filled by loader */
			operating-points-v2 = <&fusion_opp>;
			performance-domains = <&cpufreq>;
			enable-method = "spin-table";
			device_type = "cpu";
			next-level-cache = <&l2_cache>;
			i-cache-size = <0x10000>; /* P-core */
			d-cache-size = <0x10000>; /* P-core */
		};

		cpu1: cpu@10001 {
			compatible = "apple,hurricane-zephyr";
			reg = <0x0 0x10001>;
			cpu-release-addr = <0 0>; /* To be filled by loader */
			operating-points-v2 = <&fusion_opp>;
			performance-domains = <&cpufreq>;
			enable-method = "spin-table";
			device_type = "cpu";
			next-level-cache = <&l2_cache>;
			i-cache-size = <0x10000>; /* P-core */
			d-cache-size = <0x10000>; /* P-core */
		};

		l2_cache: l2-cache {
			compatible = "cache";
			cache-level = <2>;
			cache-unified;
			cache-size = <0x300000>; /* P-cluster */
		};
	};

	fusion_opp: opp-table {
		compatible = "operating-points-v2";

		/*
		 * Apple Fusion Architecture: Hardware big.LITTLE switcher

Annotation

Implementation Notes