arch/arm64/boot/dts/arm/morello.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/arm/morello.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/arm/morello.dtsi
Extension
.dtsi
Size
7075 bytes
Lines
324
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
/*
 * Copyright (c) 2020-2024, Arm Limited. All rights reserved.
 */

#include <dt-bindings/interrupt-controller/arm-gic.h>

/ {
	interrupt-parent = <&gic>;

	#address-cells = <2>;
	#size-cells = <2>;

	soc_refclk50mhz: clock-50000000 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <50000000>;
		clock-output-names = "apb_pclk";
	};

	soc_refclk85mhz: clock-85000000 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <85000000>;
		clock-output-names = "iofpga:aclk";
	};

	cpus {
		#address-cells = <2>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			compatible = "arm,rainier";
			reg = <0x0 0x0>;
			device_type = "cpu";
			enable-method = "psci";
			/* 4 ways set associative */
			i-cache-size = <0x10000>;
			i-cache-line-size = <64>;
			i-cache-sets = <512>;
			d-cache-size = <0x10000>;
			d-cache-line-size = <64>;
			d-cache-sets = <512>;
			next-level-cache = <&l2_0>;
			clocks = <&scmi_dvfs 0>;

			l2_0: l2-cache {
				compatible = "cache";
				cache-level = <2>;
				/* 8 ways set associative */
				cache-size = <0x100000>;
				cache-line-size = <64>;
				cache-sets = <2048>;
				cache-unified;
				next-level-cache = <&l3_0>;
			};
		};

		cpu1: cpu@100 {
			compatible = "arm,rainier";
			reg = <0x0 0x100>;
			device_type = "cpu";
			enable-method = "psci";
			/* 4 ways set associative */
			i-cache-size = <0x10000>;
			i-cache-line-size = <64>;
			i-cache-sets = <512>;
			d-cache-size = <0x10000>;
			d-cache-line-size = <64>;
			d-cache-sets = <512>;

Annotation

Implementation Notes