arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/broadcom/bcmbca/bcm4908.dtsi
Extension
.dtsi
Size
15320 bytes
Lines
758
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT

#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/soc/bcm-pmb.h>

/dts-v1/;

/ {
	interrupt-parent = <&gic>;

	#address-cells = <2>;
	#size-cells = <2>;

	aliases {
		serial0 = &uart0;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "brcm,brahma-b53";
			reg = <0x0>;
			enable-method = "spin-table";
			cpu-release-addr = <0x0 0xff8>;
			next-level-cache = <&l2>;
		};

		cpu1: cpu@1 {
			device_type = "cpu";
			compatible = "brcm,brahma-b53";
			reg = <0x1>;
			enable-method = "spin-table";
			cpu-release-addr = <0x0 0xff8>;
			next-level-cache = <&l2>;
		};

		cpu2: cpu@2 {
			device_type = "cpu";
			compatible = "brcm,brahma-b53";
			reg = <0x2>;
			enable-method = "spin-table";
			cpu-release-addr = <0x0 0xff8>;
			next-level-cache = <&l2>;
		};

		cpu3: cpu@3 {
			device_type = "cpu";
			compatible = "brcm,brahma-b53";
			reg = <0x3>;
			enable-method = "spin-table";
			cpu-release-addr = <0x0 0xff8>;
			next-level-cache = <&l2>;
		};

		l2: l2-cache0 {
			compatible = "cache";
			cache-level = <2>;
			cache-unified;
		};
	};

Annotation

Implementation Notes