arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-netgear-raxe500.dts
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-netgear-raxe500.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/broadcom/bcmbca/bcm4908-netgear-raxe500.dts- Extension
.dts- Size
- 586 bytes
- Lines
- 51
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
bcm4908.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "bcm4908.dtsi"
/ {
compatible = "netgear,raxe500", "brcm,bcm4908", "brcm,bcmbca";
model = "Netgear RAXE500";
memory@0 {
device_type = "memory";
reg = <0x00 0x00 0x00 0x40000000>;
};
};
&ehci {
status = "okay";
};
&ohci {
status = "okay";
};
&xhci {
status = "okay";
};
&ports {
port@0 {
label = "lan4";
};
port@1 {
label = "lan3";
};
port@2 {
label = "lan2";
};
port@3 {
label = "lan1";
};
port@7 {
reg = <7>;
phy-mode = "internal";
phy-handle = <&phy12>;
label = "wan";
};
};
Annotation
- Immediate include surface: `bcm4908.dtsi`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.