arch/arm64/boot/dts/broadcom/stingray/stingray-pcie.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/broadcom/stingray/stingray-pcie.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/broadcom/stingray/stingray-pcie.dtsi- Extension
.dtsi- Size
- 1477 bytes
- Lines
- 55
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
/*
*Copyright(c) 2018 Broadcom
*/
pcie8: pcie@60400000 {
compatible = "brcm,iproc-pcie-paxc-v2";
reg = <0 0x60400000 0 0x1000>;
linux,pci-domain = <8>;
bus-range = <0x0 0x1>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
ranges = <0x83000000 0 0x10000000 0 0x10000000 0 0x20000000>;
dma-coherent;
msi-map = <0x100 &gic_its 0x2000 0x1>, /* PF0 */
<0x108 &gic_its 0x2040 0x8>, /* PF0-VF0-7 */
<0x101 &gic_its 0x2080 0x1>, /* PF1 */
<0x110 &gic_its 0x20c8 0x8>, /* PF1-VF8-15 */
<0x102 &gic_its 0x2100 0x1>, /* PF2 */
<0x118 &gic_its 0x2150 0x8>, /* PF2-VF16-23 */
<0x103 &gic_its 0x2180 0x1>, /* PF3 */
<0x120 &gic_its 0x21d8 0x8>, /* PF3-VF24-31 */
<0x104 &gic_its 0x2200 0x1>, /* PF4 */
<0x128 &gic_its 0x2260 0x8>, /* PF4-VF32-39 */
<0x105 &gic_its 0x2280 0x1>, /* PF5 */
<0x130 &gic_its 0x22e8 0x8>, /* PF5-VF40-47 */
<0x106 &gic_its 0x2300 0x1>, /* PF6 */
<0x138 &gic_its 0x2370 0x8>, /* PF6-VF48-55 */
<0x107 &gic_its 0x2380 0x1>, /* PF7 */
<0x140 &gic_its 0x23f8 0x8>; /* PF7-VF56-63 */
phys = <&pcie_phy 8>;
phy-names = "pcie-phy";
};
pcie-ss-bus@40000000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x0 0x40000000 0x800>;
pcie_phy: phy@0 {
compatible = "brcm,sr-pcie-phy";
reg = <0x0 0x200>;
brcm,sr-cdru = <&cdru>;
brcm,sr-mhb = <&mhb>;
#phy-cells = <1>;
};
};
Annotation
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.