arch/arm64/boot/dts/cix/sky1.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/cix/sky1.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/cix/sky1.dtsi
Extension
.dtsi
Size
22097 bytes
Lines
809
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: BSD-3-Clause
/*
 * Copyright 2025 Cix Technology Group Co., Ltd.
 *
 */

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/cix,sky1.h>
#include "sky1-power.h"

/ {
	interrupt-parent = <&gic>;
	#address-cells = <2>;
	#size-cells = <2>;

	cpus {
		#address-cells = <2>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			compatible = "arm,cortex-a520";
			enable-method = "psci";
			reg = <0x0 0x0>;
			device_type = "cpu";
			power-domains = <&scmi_dvfs SKY1_PERF_CPU_L>;
			power-domain-names = "perf";
			capacity-dmips-mhz = <403>;
			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
		};

		cpu1: cpu@100 {
			compatible = "arm,cortex-a520";
			enable-method = "psci";
			reg = <0x0 0x100>;
			device_type = "cpu";
			power-domains = <&scmi_dvfs SKY1_PERF_CPU_L>;
			power-domain-names = "perf";
			capacity-dmips-mhz = <403>;
			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
		};

		cpu2: cpu@200 {
			compatible = "arm,cortex-a520";
			enable-method = "psci";
			reg = <0x0 0x200>;
			device_type = "cpu";
			power-domains = <&scmi_dvfs SKY1_PERF_CPU_L>;
			power-domain-names = "perf";
			capacity-dmips-mhz = <403>;
			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
		};

		cpu3: cpu@300 {
			compatible = "arm,cortex-a520";
			enable-method = "psci";
			reg = <0x0 0x300>;
			device_type = "cpu";
			power-domains = <&scmi_dvfs SKY1_PERF_CPU_L>;
			power-domain-names = "perf";
			capacity-dmips-mhz = <403>;
			cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
		};

		cpu4: cpu@400 {
			compatible = "arm,cortex-a720";
			enable-method = "psci";
			reg = <0x0 0x400>;
			device_type = "cpu";
			power-domains = <&scmi_dvfs SKY1_PERF_CPU_M0>;
			power-domain-names = "perf";

Annotation

Implementation Notes