arch/arm64/boot/dts/exynos/exynos2200.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/exynos/exynos2200.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/exynos/exynos2200.dtsi- Extension
.dtsi- Size
- 56159 bytes
- Lines
- 1925
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/clock/samsung,exynos2200-cmu.hdt-bindings/interrupt-controller/arm-gic.hdt-bindings/soc/samsung,exynos-usi.hexynos2200-pinctrl.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
/*
* Samsung's Exynos 2200 SoC device tree source
*
* Copyright (c) 2025, Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
*/
#include <dt-bindings/clock/samsung,exynos2200-cmu.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/soc/samsung,exynos-usi.h>
/ {
compatible = "samsung,exynos2200";
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&gic>;
aliases {
pinctrl0 = &pinctrl_alive;
pinctrl1 = &pinctrl_cmgp;
pinctrl2 = &pinctrl_hsi1;
pinctrl3 = &pinctrl_ufs;
pinctrl4 = &pinctrl_hsi1ufs;
pinctrl5 = &pinctrl_peric0;
pinctrl6 = &pinctrl_peric1;
pinctrl7 = &pinctrl_peric2;
pinctrl8 = &pinctrl_vts;
};
xtcxo: clock-1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-output-names = "oscclk";
};
ext_26m: clock-2 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-output-names = "ext-26m";
};
ext_200m: clock-3 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-output-names = "ext-200m";
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu-map {
cluster0 {
core0 {
cpu = <&cpu0>;
};
core1 {
cpu = <&cpu1>;
};
core2 {
cpu = <&cpu2>;
};
core3 {
cpu = <&cpu3>;
};
};
Annotation
- Immediate include surface: `dt-bindings/clock/samsung,exynos2200-cmu.h`, `dt-bindings/interrupt-controller/arm-gic.h`, `dt-bindings/soc/samsung,exynos-usi.h`, `exynos2200-pinctrl.dtsi`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.