arch/arm64/boot/dts/exynos/exynos850.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/exynos/exynos850.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/exynos/exynos850.dtsi
Extension
.dtsi
Size
25666 bytes
Lines
923
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * Samsung Exynos850 SoC device tree source
 *
 * Copyright (C) 2018 Samsung Electronics Co., Ltd.
 * Copyright (C) 2021 Linaro Ltd.
 *
 * Samsung Exynos850 SoC device nodes are listed in this file.
 * Exynos850 based board files can include this file and provide
 * values for board specific bindings.
 */

#include <dt-bindings/clock/exynos850.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/soc/samsung,exynos-usi.h>

/ {
	/* Also known under engineering name Exynos3830 */
	compatible = "samsung,exynos850";
	#address-cells = <2>;
	#size-cells = <1>;

	interrupt-parent = <&gic>;

	aliases {
		pinctrl0 = &pinctrl_alive;
		pinctrl1 = &pinctrl_cmgp;
		pinctrl2 = &pinctrl_aud;
		pinctrl3 = &pinctrl_hsi;
		pinctrl4 = &pinctrl_core;
		pinctrl5 = &pinctrl_peri;
	};

	arm-pmu {
		compatible = "arm,cortex-a55-pmu";
		interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>,
				     <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
	};

	/* Main system clock (XTCXO); external, must be 26 MHz */
	oscclk: clock-oscclk {
		compatible = "fixed-clock";
		clock-output-names = "oscclk";
		#clock-cells = <0>;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu-map {
			cluster0 {
				core0 {
					cpu = <&cpu0>;
				};
				core1 {
					cpu = <&cpu1>;
				};
				core2 {
					cpu = <&cpu2>;
				};
				core3 {

Annotation

Implementation Notes