arch/arm64/boot/dts/exynos/exynosautov9.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/exynos/exynosautov9.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/exynos/exynosautov9.dtsi
Extension
.dtsi
Size
47774 bytes
Lines
1641
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * Samsung's ExynosAuto v9 SoC device tree source
 *
 * Copyright (c) 2021 Samsung Electronics Co., Ltd.
 *
 */

#include <dt-bindings/clock/samsung,exynosautov9.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/soc/samsung,boot-mode.h>
#include <dt-bindings/soc/samsung,exynos-usi.h>

/ {
	compatible = "samsung,exynosautov9";
	#address-cells = <2>;
	#size-cells = <1>;

	interrupt-parent = <&gic>;

	aliases {
		pinctrl0 = &pinctrl_alive;
		pinctrl1 = &pinctrl_aud;
		pinctrl2 = &pinctrl_fsys0;
		pinctrl3 = &pinctrl_fsys1;
		pinctrl4 = &pinctrl_fsys2;
		pinctrl5 = &pinctrl_peric0;
		pinctrl6 = &pinctrl_peric1;
	};

	arm-pmu {
		compatible = "arm,cortex-a76-pmu";
		interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>,
				     <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu-map {
			cluster0 {
				core0 {
					cpu = <&cpu0>;
				};
				core1 {
					cpu = <&cpu1>;
				};
				core2 {
					cpu = <&cpu2>;
				};
				core3 {
					cpu = <&cpu3>;
				};
			};

			cluster1 {
				core0 {
					cpu = <&cpu4>;
				};
				core1 {
					cpu = <&cpu5>;

Annotation

Implementation Notes