arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-65bb.dtso
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-65bb.dtso
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/freescale/fsl-ls1028a-qds-65bb.dtso- Extension
.dtso- Size
- 1392 bytes
- Lines
- 86
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: arch/arm64
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree fragment for LS1028A QDS board, serdes 69xx
*
* Copyright 2019-2021 NXP
*
* Requires a LS1028A QDS board with lane B rework.
* Requires a SCH-30842 card in slot 1 and a SCH-28021 card in slot 2.
*/
/dts-v1/;
/plugin/;
&mdio_slot1 {
#address-cells = <1>;
#size-cells = <0>;
slot1_sgmii: ethernet-phy@2 {
/* AQR112 */
reg = <0x2>;
compatible = "ethernet-phy-ieee802.3-c45";
};
};
&enetc_port0 {
phy-handle = <&slot1_sgmii>;
phy-mode = "2500base-x";
status = "okay";
};
&mdio_slot2 {
#address-cells = <1>;
#size-cells = <0>;
/* 4 ports on VSC8514 */
slot2_qsgmii0: ethernet-phy@8 {
reg = <0x8>;
};
slot2_qsgmii1: ethernet-phy@9 {
reg = <0x9>;
};
slot2_qsgmii2: ethernet-phy@a {
reg = <0xa>;
};
slot2_qsgmii3: ethernet-phy@b {
reg = <0xb>;
};
};
&mscc_felix_ports {
port@0 {
status = "okay";
phy-handle = <&slot2_qsgmii0>;
phy-mode = "qsgmii";
managed = "in-band-status";
};
port@1 {
status = "okay";
phy-handle = <&slot2_qsgmii1>;
phy-mode = "qsgmii";
managed = "in-band-status";
};
port@2 {
status = "okay";
phy-handle = <&slot2_qsgmii2>;
Annotation
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.