arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
Extension
.dtsi
Size
32750 bytes
Lines
1257
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Device Tree Include file for Freescale Layerscape-2080A family SoC.
 *
 * Copyright 2016 Freescale Semiconductor, Inc.
 * Copyright 2017-2020 NXP
 *
 * Abhimanyu Saini <abhimanyu.saini@nxp.com>
 *
 */

#include <dt-bindings/clock/fsl,qoriq-clockgen.h>
#include <dt-bindings/thermal/thermal.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>

/ {
	compatible = "fsl,ls2080a";
	interrupt-parent = <&gic>;
	#address-cells = <2>;
	#size-cells = <2>;

	aliases {
		crypto = &crypto;
		rtc1 = &ftm_alarm0;
		serial0 = &serial0;
		serial1 = &serial1;
		serial2 = &serial2;
		serial3 = &serial3;
	};

	cpu: cpus {
		#address-cells = <1>;
		#size-cells = <0>;
	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x00000000 0x80000000 0 0x80000000>;
		      /* DRAM space - 1, size : 2 GB DRAM */
	};

	sysclk: sysclk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <100000000>;
		clock-output-names = "sysclk";
	};

	gic: interrupt-controller@6000000 {
		compatible = "arm,gic-v3";
		reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
			<0x0 0x06100000 0 0x100000>, /* GICR (RD_base + SGI_base) */
			<0x0 0x0c0c0000 0 0x2000>, /* GICC */
			<0x0 0x0c0d0000 0 0x1000>, /* GICH */
			<0x0 0x0c0e0000 0 0x20000>; /* GICV */
		#interrupt-cells = <3>;
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;
		interrupt-controller;
		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;

		its: msi-controller@6020000 {
			compatible = "arm,gic-v3-its";
			msi-controller;
			#msi-cells = <1>;
			reg = <0x0 0x6020000 0 0x20000>;
		};
	};

Annotation

Implementation Notes