arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi- Extension
.dtsi- Size
- 3816 bytes
- Lines
- 226
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree file for Freescale LS2080A QDS Board.
*
* Copyright 2016 Freescale Semiconductor, Inc.
* Copyright 2017 NXP
*
* Abhimanyu Saini <abhimanyu.saini@nxp.com>
*
*/
/* Update DPMAC connections to external PHYs, under SerDes 0x2a_0x49. */
&dpmac9 {
phy-handle = <&mdio0_phy12>;
phy-connection-type = "sgmii";
};
&dpmac10 {
phy-handle = <&mdio0_phy13>;
phy-connection-type = "sgmii";
};
&dpmac11 {
phy-handle = <&mdio0_phy14>;
phy-connection-type = "sgmii";
};
&dpmac12 {
phy-handle = <&mdio0_phy15>;
phy-connection-type = "sgmii";
};
&esdhc {
mmc-hs200-1_8v;
status = "okay";
};
&ifc {
status = "okay";
#address-cells = <2>;
#size-cells = <1>;
ranges = <0x0 0x0 0x5 0x80000000 0x08000000
0x2 0x0 0x5 0x30000000 0x00010000
0x3 0x0 0x5 0x20000000 0x00010000>;
flash@0,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0x0 0x0 0x8000000>;
bank-width = <2>;
device-width = <1>;
};
nand@2,0 {
compatible = "fsl,ifc-nand";
reg = <0x2 0x0 0x10000>;
};
boardctrl: board-control@3,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "fsl,ls208xaqds-fpga", "fsl,fpga-qixis", "simple-mfd";
reg = <3 0 0x1000>;
ranges = <0 3 0 0x1000>;
mdio-mux@54 {
compatible = "mdio-mux-mmioreg", "mdio-mux";
mdio-parent-bus = <&emdio1>;
reg = <0x54 1>; /* BRDCFG4 */
Annotation
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.