arch/arm64/boot/dts/freescale/fsl-lx2162a-sr-som.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/freescale/fsl-lx2162a-sr-som.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/freescale/fsl-lx2162a-sr-som.dtsi- Extension
.dtsi- Size
- 1613 bytes
- Lines
- 100
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
//
// Device Tree file for LX2162A-SOM
//
// Copyright 2021 Rabeeh Khoury <rabeeh@solid-run.com>
// Copyright 2023 Josua Mayer <josua@solid-run.com>
/ {
model = "SolidRun LX2162A System on Module";
compatible = "solidrun,lx2162a-som", "fsl,lx2160a";
aliases {
crypto = &crypto;
rtc0 = &som_rtc;
};
};
&crypto {
status = "okay";
};
&dpmac17 {
phy-handle = <ðernet_phy0>;
phy-connection-type = "rgmii-id";
};
&emdio1 {
status = "okay";
ethernet_phy0: ethernet-phy@1 {
reg = <1>;
};
};
&esdhc1 {
bus-width = <8>;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
status = "okay";
};
&fspi {
pinctrl-names = "default";
pinctrl-0 = <&fspi_data74_pins>, <&fspi_data30_pins>, <&fspi_dqs_sck_cs10_pins>;
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
m25p,fast-read;
spi-max-frequency = <50000000>;
/* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */
spi-rx-bus-width = <8>;
spi-tx-bus-width = <1>;
};
};
&i2c0 {
status = "okay";
fan-controller@18 {
compatible = "ti,amc6821";
reg = <0x18>;
};
ddr_spd: eeprom@51 {
compatible = "st,24c02", "atmel,24c02";
reg = <0x51>;
read-only;
};
Annotation
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.