arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/freescale/imx8-ss-dma.dtsi
Extension
.dtsi
Size
17706 bytes
Lines
567
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright 2018-2019 NXP
 *	Dong Aisheng <aisheng.dong@nxp.com>
 */

#include <dt-bindings/clock/imx8-lpcg.h>
#include <dt-bindings/dma/fsl-edma.h>
#include <dt-bindings/firmware/imx/rsrc.h>

dma_ipg_clk: clock-dma-ipg {
	compatible = "fixed-clock";
	#clock-cells = <0>;
	clock-frequency = <120000000>;
	clock-output-names = "dma_ipg_clk";
};

dma_subsys: bus@5a000000 {
	compatible = "simple-bus";
	#address-cells = <1>;
	#size-cells = <1>;
	ranges = <0x5a000000 0x0 0x5a000000 0x1000000>;

	lpspi0: spi@5a000000 {
		compatible = "fsl,imx7ulp-spi";
		reg = <0x5a000000 0x10000>;
		#address-cells = <1>;
		#size-cells = <0>;
		interrupts = <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-parent = <&gic>;
		clocks = <&spi0_lpcg IMX_LPCG_CLK_0>,
			 <&spi0_lpcg IMX_LPCG_CLK_4>;
		clock-names = "per", "ipg";
		assigned-clocks = <&clk IMX_SC_R_SPI_0 IMX_SC_PM_CLK_PER>;
		assigned-clock-rates = <60000000>;
		power-domains = <&pd IMX_SC_R_SPI_0>;
		dmas = <&edma2 1 0 0>, <&edma2 0 0 FSL_EDMA_RX>;
		dma-names = "tx", "rx";
		status = "disabled";
	};

	lpspi1: spi@5a010000 {
		compatible = "fsl,imx7ulp-spi";
		reg = <0x5a010000 0x10000>;
		#address-cells = <1>;
		#size-cells = <0>;
		interrupts = <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-parent = <&gic>;
		clocks = <&spi1_lpcg IMX_LPCG_CLK_0>,
			 <&spi1_lpcg IMX_LPCG_CLK_4>;
		clock-names = "per", "ipg";
		assigned-clocks = <&clk IMX_SC_R_SPI_1 IMX_SC_PM_CLK_PER>;
		assigned-clock-rates = <60000000>;
		power-domains = <&pd IMX_SC_R_SPI_1>;
		dmas = <&edma2 3 0 0>, <&edma2 2 0 FSL_EDMA_RX>;
		dma-names = "tx", "rx";
		status = "disabled";
	};

	lpspi2: spi@5a020000 {
		compatible = "fsl,imx7ulp-spi";
		reg = <0x5a020000 0x10000>;
		#address-cells = <1>;
		#size-cells = <0>;
		interrupts = <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-parent = <&gic>;
		clocks = <&spi2_lpcg IMX_LPCG_CLK_0>,
			 <&spi2_lpcg IMX_LPCG_CLK_4>;
		clock-names = "per", "ipg";
		assigned-clocks = <&clk IMX_SC_R_SPI_2 IMX_SC_PM_CLK_PER>;

Annotation

Implementation Notes