arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi
Extension
.dtsi
Size
4287 bytes
Lines
155
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0+
/*
 * Copyright 2024 NXP
 *
 * Richard Zhu <hongxing.zhu@nxp.com>
 */
#include <dt-bindings/phy/phy.h>

hsio_axi_clk: clock-hsio-axi {
	compatible = "fixed-clock";
	#clock-cells = <0>;
	clock-frequency = <400000000>;
	clock-output-names = "hsio_axi_clk";
};

hsio_per_clk: clock-hsio-per {
	compatible = "fixed-clock";
	#clock-cells = <0>;
	clock-frequency = <133333333>;
	clock-output-names = "hsio_per_clk";
};

hsio_refa_clk: clock-hsio-refa {
	compatible = "gpio-gate-clock";
	clocks = <&xtal100m>;
	#clock-cells = <0>;
	enable-gpios = <&lsio_gpio4 27 GPIO_ACTIVE_LOW>;
};

hsio_refb_clk: clock-hsio-refb {
	compatible = "gpio-gate-clock";
	clocks = <&xtal100m>;
	#clock-cells = <0>;
	enable-gpios = <&lsio_gpio4 1 GPIO_ACTIVE_LOW>;
};

xtal100m: clock-xtal100m {
	compatible = "fixed-clock";
	#clock-cells = <0>;
	clock-frequency = <100000000>;
	clock-output-names = "xtal_100MHz";
};

hsio_subsys: bus@5f000000 {
	compatible = "simple-bus";
	ranges = <0x5f000000 0x0 0x5f000000 0x01000000>,
		 <0x80000000 0x0 0x70000000 0x10000000>;
	#address-cells = <1>;
	#size-cells = <1>;
	dma-ranges = <0x80000000 0 0x80000000 0x80000000>;

	pcieb: pcie@5f010000 {
		compatible = "fsl,imx8q-pcie";
		reg = <0x5f010000 0x10000>,
		      <0x8ff00000 0x80000>;
		reg-names = "dbi", "config";
		ranges = <0x81000000 0 0x00000000 0x8ff80000 0 0x00010000>,
			 <0x82000000 0 0x80000000 0x80000000 0 0x0ff00000>;
		#interrupt-cells = <1>;
		interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "msi", "dma";
		#address-cells = <3>;
		#size-cells = <2>;
		clocks = <&pcieb_lpcg IMX_LPCG_CLK_6>,
			 <&pcieb_lpcg IMX_LPCG_CLK_4>,
			 <&pcieb_lpcg IMX_LPCG_CLK_5>;
		clock-names = "dbi", "mstr", "slv";
		bus-range = <0x00 0xff>;
		device_type = "pci";

Annotation

Implementation Notes