arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-edimm2.2.dts

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-edimm2.2.dts

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/freescale/imx8mm-icore-mx8mm-edimm2.2.dts
Extension
.dts
Size
1887 bytes
Lines
97
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2019 NXP
 * Copyright (c) 2019 Engicam srl
 * Copyright (c) 2020 Amarula Solutions(India)
 */

/dts-v1/;
#include "imx8mm.dtsi"
#include "imx8mm-icore-mx8mm.dtsi"

/ {
	model = "Engicam i.Core MX8M Mini EDIMM2.2 Starter Kit";
	compatible = "engicam,icore-mx8mm-edimm2.2", "engicam,icore-mx8mm",
		     "fsl,imx8mm";

	chosen {
		stdout-path = &uart2;
	};
};

&fec1 {
	status = "okay";
};

&i2c2 {
	clock-frequency = <400000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";
};

&i2c4 {
	clock-frequency = <100000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c4>;
	status = "okay";
};

&iomuxc {
	pinctrl_i2c2: i2c2grp {
		fsl,pins = <
			MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL		0x400001c3
			MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA		0x400001c3
		>;
	};

	pinctrl_i2c4: i2c4grp {
		fsl,pins = <
			MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL		0x400001c3
			MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA		0x400001c3
		>;
	};

	pinctrl_uart2: uart2grp {
		fsl,pins = <
			MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX	0x140
			MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX	0x140
		>;
	};

	pinctrl_usdhc1_gpio: usdhc1gpiogrp {
		fsl,pins = <
			MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6	0x41
		>;
	};

	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			MX8MM_IOMUXC_SD1_CLK_USDHC1_CLK		0x190

Annotation

Implementation Notes