arch/arm64/boot/dts/freescale/imx8mm-sr-som.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/freescale/imx8mm-sr-som.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/freescale/imx8mm-sr-som.dtsi- Extension
.dtsi- Size
- 9832 bytes
- Lines
- 394
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/phy/phy-imx8-pcie.himx8mm.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2025 Josua Mayer <josua@solid-run.com>
*/
#include <dt-bindings/phy/phy-imx8-pcie.h>
#include "imx8mm.dtsi"
/ {
compatible = "solidrun,imx8mm-sr-som", "fsl,imx8mm";
model = "SolidRun i.MX8MM SoM";
chosen {
bootargs = "earlycon=ec_imx6q,0x30890000,115200";
stdout-path = &uart2;
};
v_1_8: regulator-1-8 {
compatible = "regulator-fixed";
regulator-name = "1v8";
regulator-max-microvolt = <1800000>;
regulator-min-microvolt = <1800000>;
};
v_3_3: regulator-3-3 {
compatible = "regulator-fixed";
regulator-name = "3v3";
regulator-max-microvolt = <3300000>;
regulator-min-microvolt = <3300000>;
};
usdhc1_pwrseq: usdhc1-pwrseq {
compatible = "mmc-pwrseq-simple";
reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
};
memory@40000000 {
reg = <0x0 0x40000000 0 0x80000000>;
device_type = "memory";
};
};
&fec1 {
phy = <&phy0>;
phy-mode = "rgmii-id";
pinctrl-0 = <&fec1_pins>;
pinctrl-names = "default";
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@4 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0x4>;
phy-reset-duration = <10>;
reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
vddio-supply = <&vddio>;
qca,smarteee-tw-us-1g = <24>;
vddio: vddio-regulator {
regulator-max-microvolt = <1800000>;
regulator-min-microvolt = <1800000>;
};
};
};
};
Annotation
- Immediate include surface: `dt-bindings/phy/phy-imx8-pcie.h`, `imx8mm.dtsi`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.