arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
Extension
.dts
Size
3458 bytes
Lines
177
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright 2019 NXP
 */

/dts-v1/;

#include "imx8mn.dtsi"
#include "imx8mn-evk.dtsi"

/ {
	model = "NXP i.MX8MNano DDR4 EVK board";
	compatible = "fsl,imx8mn-ddr4-evk", "fsl,imx8mn";
};

&A53_0 {
	cpu-supply = <&buck2_reg>;
};

&A53_1 {
	cpu-supply = <&buck2_reg>;
};

&A53_2 {
	cpu-supply = <&buck2_reg>;
};

&A53_3 {
	cpu-supply = <&buck2_reg>;
};

&ddrc {
	operating-points-v2 = <&ddrc_opp_table>;

	ddrc_opp_table: opp-table {
		compatible = "operating-points-v2";

		opp-25000000 {
			opp-hz = /bits/ 64 <25000000>;
		};

		opp-100000000 {
			opp-hz = /bits/ 64 <100000000>;
		};

		opp-600000000 {
			opp-hz = /bits/ 64 <600000000>;
		};
	};
};

&i2c1 {
	pmic@4b {
		compatible = "rohm,bd71847";
		reg = <0x4b>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_pmic>;
		interrupt-parent = <&gpio1>;
		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
		rohm,reset-snvs-powered;

		#clock-cells = <0>;
		clocks = <&osc_32k>;
		clock-output-names = "clk-32k-out";

		regulators {
			buck1_reg: BUCK1 {
				regulator-name = "buck1";
				regulator-min-microvolt = <700000>;
				regulator-max-microvolt = <1300000>;

Annotation

Implementation Notes