arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/freescale/imx8mp-data-modul-edm-sbc.dts- Extension
.dts- Size
- 29951 bytes
- Lines
- 1214
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/net/qca-ar803x.hdt-bindings/phy/phy-imx8-pcie.himx8mp.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2022 Marek Vasut <marex@denx.de>
*/
/dts-v1/;
#include <dt-bindings/net/qca-ar803x.h>
#include <dt-bindings/phy/phy-imx8-pcie.h>
#include "imx8mp.dtsi"
/ {
model = "Data Modul i.MX8M Plus eDM SBC";
compatible = "dmo,imx8mp-data-modul-edm-sbc", "fsl,imx8mp";
aliases {
rtc0 = &rtc;
rtc1 = &snvs_rtc;
};
chosen {
stdout-path = &uart3;
};
memory@40000000 {
device_type = "memory";
/* There are 1/2/4 GiB options, adjusted by bootloader. */
reg = <0x0 0x40000000 0 0x40000000>;
};
backlight: backlight {
compatible = "pwm-backlight";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_panel_backlight>;
brightness-levels = <0 1 10 20 30 40 50 60 70 75 80 90 100>;
default-brightness-level = <7>;
enable-gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
pwms = <&pwm1 0 5000000 0>;
/* Disabled by default, unless display board plugged in. */
status = "disabled";
};
clk_xtal25: clock-xtal25 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
};
clk_pwm4: clock-pwm4 {
compatible = "pwm-clock";
#clock-cells = <0>;
clock-frequency = <12000000>;
clock-output-names = "codec-pwm4";
/*
* 1 / 83 ns ~= 12 MHz , but since the PWM input clock is 24 MHz
* and the calculated PWM period is 1 and duty cycle is 50%, the
* result is exactly 12 MHz, which is fine for SGTL5000 MCLK.
*/
pwms = <&pwm4 0 83 0>;
};
hdmi-connector {
compatible = "hdmi-connector";
label = "J17";
type = "a";
port {
hdmi_connector_in: endpoint {
remote-endpoint = <&hdmi_tx_out>;
};
Annotation
- Immediate include surface: `dt-bindings/net/qca-ar803x.h`, `dt-bindings/phy/phy-imx8-pcie.h`, `imx8mp.dtsi`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.