arch/arm64/boot/dts/freescale/imx8mp-dhcom-drc02.dts
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/freescale/imx8mp-dhcom-drc02.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/freescale/imx8mp-dhcom-drc02.dts- Extension
.dts- Size
- 5780 bytes
- Lines
- 256
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/leds/common.hdt-bindings/phy/phy-imx8-pcie.himx8mp-dhcom-som.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2024 Marek Vasut <marex@denx.de>
*
* DHCOM iMX8MP variant:
* DHCM-iMX8ML8-C160-R204-F1638-SPI16-E2-CAN2-RTC-I-01D2
* DHCOM PCB number: 660-100 or newer
* DRC02 PCB number: 568-100 or newer
*/
/dts-v1/;
#include <dt-bindings/leds/common.h>
#include <dt-bindings/phy/phy-imx8-pcie.h>
#include "imx8mp-dhcom-som.dtsi"
/ {
model = "DH electronics i.MX8M Plus DHCOM on DRC02";
compatible = "dh,imx8mp-dhcom-drc02", "dh,imx8mp-dhcom-som",
"fsl,imx8mp";
chosen {
stdout-path = &uart1;
};
};
&eqos { /* First ethernet */
pinctrl-0 = <&pinctrl_eqos_rmii>;
phy-handle = <ðphy0f>;
phy-mode = "rmii";
assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>,
<&clk IMX8MP_SYS_PLL2_100M>,
<&clk IMX8MP_SYS_PLL2_50M>;
assigned-clock-rates = <0>, <100000000>, <50000000>;
};
ðphy0g { /* Micrel KSZ9131RNXI */
status = "disabled";
};
ðphy0f { /* SMSC LAN8740Ai */
status = "okay";
};
&fec { /* Second ethernet */
pinctrl-0 = <&pinctrl_fec_rmii>;
phy-handle = <ðphy1f>;
phy-mode = "rmii";
status = "okay";
assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>,
<&clk IMX8MP_SYS_PLL2_100M>,
<&clk IMX8MP_SYS_PLL2_50M>,
<&clk IMX8MP_SYS_PLL2_50M>;
assigned-clock-rates = <0>, <100000000>, <50000000>, <0>;
};
ðphy1f { /* SMSC LAN8740Ai */
status = "okay";
};
&flexcan1 {
status = "okay";
};
&flexcan2 {
status = "okay";
};
Annotation
- Immediate include surface: `dt-bindings/leds/common.h`, `dt-bindings/phy/phy-imx8-pcie.h`, `imx8mp-dhcom-som.dtsi`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.