arch/arm64/boot/dts/freescale/imx8mp-sr-som.dtsi

Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/freescale/imx8mp-sr-som.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm64/boot/dts/freescale/imx8mp-sr-som.dtsi
Extension
.dtsi
Size
14841 bytes
Lines
592
Domain
Architecture Layer
Bucket
arch/arm64
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright 2025 Josua Mayer <josua@solid-run.com>
 */

#include "imx8mp.dtsi"

/ {
	model = "SolidRun i.MX8MP SoM";
	compatible = "solidrun,imx8mp-sr-som", "fsl,imx8mp";

	chosen {
		bootargs = "earlycon=ec_imx6q,0x30890000,115200";
		stdout-path = &uart2;
	};

	memory@40000000 {
		device_type = "memory";
		reg = <0x0 0x40000000 0 0xc0000000>,
		      <0x1 0x00000000 0 0xc0000000>;
	};

	usdhc1_pwrseq: usdhc1-pwrseq {
		compatible = "mmc-pwrseq-simple";
		reset-gpios = <&gpio2 11 GPIO_ACTIVE_LOW>;
	};

	v_1_8: regulator-1-8 {
		compatible = "regulator-fixed";
		regulator-name = "1v8";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
	};

	v_3_3: regulator-3-3 {
		compatible = "regulator-fixed";
		regulator-name = "3v3";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};
};

/*
 * Reserve all physical memory from within the first 1GB of DDR address
 * space to avoid panic on low memory systems.
 */
&dsp_reserved {
	reg = <0 0x6f000000 0 0x1000000>;
};

&eqos {
	pinctrl-names = "default";
	pinctrl-0 = <&eqos_pins>, <&phy0_pins>;
	phy-mode = "rgmii-id";
	phy = <&phy0>;
	snps,force_thresh_dma_mode;
	snps,mtl-tx-config = <&mtl_tx_setup>;
	snps,mtl-rx-config = <&mtl_rx_setup>;
	status = "okay";

	mdio {
		compatible = "snps,dwmac-mdio";
		#address-cells = <1>;
		#size-cells = <0>;

		phy0: ethernet-phy@0 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <0>;
			reset-gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
			interrupt-parent = <&gpio4>;

Annotation

Implementation Notes