arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/freescale/imx8mp-tqma8mpql.dtsi- Extension
.dtsi- Size
- 7910 bytes
- Lines
- 298
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
imx8mp.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2021-2025 TQ-Systems GmbH <linux@ew.tq-group.com>,
* D-82229 Seefeld, Germany.
* Author: Alexander Stein
*/
#include "imx8mp.dtsi"
/ {
model = "TQ-Systems i.MX8MPlus TQMa8MPxL";
compatible = "tq,imx8mp-tqma8mpql", "fsl,imx8mp";
memory@40000000 {
device_type = "memory";
reg = <0x0 0x40000000 0 0x80000000>;
};
reg_usdhc2_vqmmc: regulator-usdhc2-vqmmc {
compatible = "regulator-gpio";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reg_usdhc2_vqmmc>;
regulator-name = "V_SD2";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
states = <1800000 0x1>,
<3300000 0x0>;
vin-supply = <&ldo5_reg>;
status = "disabled";
};
};
&A53_0 {
cpu-supply = <&buck2_reg>;
};
&easrc {
status = "okay";
};
&flexspi {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexspi0>;
status = "okay";
flash0: flash@0 {
reg = <0>;
compatible = "jedec,spi-nor";
spi-max-frequency = <80000000>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
vcc-supply = <&buck5_reg>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
};
};
};
&i2c1 {
clock-frequency = <384000>;
pinctrl-names = "default", "gpio";
pinctrl-0 = <&pinctrl_i2c1>;
pinctrl-1 = <&pinctrl_i2c1_gpio>;
scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
status = "okay";
Annotation
- Immediate include surface: `imx8mp.dtsi`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.