arch/arm64/boot/dts/freescale/imx8mp-var-som-symphony.dts
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/freescale/imx8mp-var-som-symphony.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/freescale/imx8mp-var-som-symphony.dts- Extension
.dts- Size
- 4453 bytes
- Lines
- 157
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
imx8mp-var-som.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2024 Variscite Ltd.
*/
#include "imx8mp-var-som.dtsi"
/ {
model = "Variscite VAR-SOM-MX8M-PLUS on Symphony-Board";
compatible = "variscite,var-som-mx8mp-symphony", "variscite,var-som-mx8mp", "fsl,imx8mp";
chosen {
stdout-path = &uart2;
};
gpio-leds {
compatible = "gpio-leds";
led-0 {
function = LED_FUNCTION_POWER;
gpios = <&pca9534 0 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
compatible = "regulator-fixed";
regulator-name = "VSD_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio4 22 GPIO_ACTIVE_HIGH>;
enable-active-high;
startup-delay-us = <100>;
off-on-delay-us = <12000>;
};
reg_usdhc2_vqmmc: regulator-usdhc2-vqmmc {
compatible = "regulator-gpio";
regulator-name = "VSD_VSEL";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
states = <3300000 0x0 1800000 0x1>;
vin-supply = <&ldo5>;
};
};
&i2c3 {
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
/* GPIO expander */
pca9534: gpio@20 {
compatible = "nxp,pca9534";
reg = <0x20>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pca9534>;
gpio-controller;
#gpio-cells = <2>;
interrupt-parent = <&gpio1>;
interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
wakeup-source;
usb3-sata-sel-hog {
gpio-hog;
gpios = <4 0>;
output-low;
line-name = "usb3_sata_sel";
Annotation
- Immediate include surface: `imx8mp-var-som.dtsi`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.