arch/arm64/boot/dts/freescale/imx8mq-tqma8mq.dtsi
Source file repositories/reference/linux-study-clean/arch/arm64/boot/dts/freescale/imx8mq-tqma8mq.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm64/boot/dts/freescale/imx8mq-tqma8mq.dtsi- Extension
.dtsi- Size
- 8904 bytes
- Lines
- 363
- Domain
- Architecture Layer
- Bucket
- arch/arm64
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
imx8mq.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
/*
* Copyright 2019-2021 TQ-Systems GmbH
*/
#include "imx8mq.dtsi"
/ {
model = "TQ-Systems GmbH i.MX8MQ TQMa8MQ";
compatible = "tq,imx8mq-tqma8mq", "fsl,imx8mq";
memory@40000000 {
device_type = "memory";
/* our minimum RAM config will be 1024 MiB */
reg = <0x00000000 0x40000000 0 0x40000000>;
};
/* e-MMC IO, needed for HS modes */
reg_vcc1v8: regulator-vcc1v8 {
compatible = "regulator-fixed";
regulator-name = "TQMA8MX_VCC1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
reg_vcc3v3: regulator-vcc3v3 {
compatible = "regulator-fixed";
regulator-name = "TQMA8MX_VCC3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
reg_vdd_arm: regulator-vdd-arm {
compatible = "regulator-gpio";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_dvfs>;
regulator-min-microvolt = <900000>;
regulator-max-microvolt = <1000000>;
regulator-name = "TQMa8Mx_DVFS";
regulator-type = "voltage";
regulator-settling-time-us = <150000>;
gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
states = <900000 0x1 1000000 0x0>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* global autoconfigured region for contiguous allocations */
linux,cma {
compatible = "shared-dma-pool";
reusable;
/* 640 MiB */
size = <0 0x28000000>;
/* 1024 - 128 MiB, our minimum RAM config will be 1024 MiB */
alloc-ranges = <0 0x40000000 0 0x78000000>;
linux,cma-default;
};
};
};
&A53_0 {
cpu-supply = <®_vdd_arm>;
};
&A53_1 {
cpu-supply = <®_vdd_arm>;
};
Annotation
- Immediate include surface: `imx8mq.dtsi`.
- Atlas domain: Architecture Layer / arch/arm64.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.